NDLI: A qualitative analysis of the intrusion-tolerance capabilities of the MAFTIA architecture

Content Provider	IEEE Xplore Digital Library
Author	Stroud, R. Welch, I. Warne, J. Ryan, P.
Copyright Year	2004
Description	Author affiliation: Sch. of Comput. Sci., Newcastle Univ., Newcastle upon Tyne, UK (Stroud, R.; Welch, I.; Warne, J.; Ryan, P.)
Abstract	MAFTIA was a three-year European research project that explored the use of fault-tolerance techniques to build intrusion-tolerant systems. The MAFTIA architecture embodies a number of key design principles for building intrusion-tolerant systems, such as the notion of distributing trust throughout the system and limiting the extent to which individual components are trusted, and the aim of this paper is to illustrate these principles and demonstrate MAFTIA s intrusion-tolerance capabilities by showing how MAFTIA mechanisms and protocols might be deployed in a realistic context. We discuss the relationship between intrusion tolerance and fault tolerance, and then describe how the MAFTIA architecture could be used to build an intrusion-tolerant version of a hypothetical e-commerce application. Using fault trees, we analyse possible attack scenarios and show how MAFTIA mechanisms protect against them. We conclude the paper with a discussion of related work and identify areas for future research.
Sponsorship	IEEE Comput. Soc. Tech. Committee on Fault-Tolerant Comput. IFIP WG 10.4 on Dependable Comput. and Fault Tolerance
Starting Page	453
Ending Page	461
File Size	417476
Page Count	9
File Format	PDF
ISBN	0769520529
DOI	10.1109/DSN.2004.1311915
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2004-06-28
Publisher Place	Italy
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Fault tolerant systems Computer architecture Protocols Fault trees Buildings Fault tolerance Protection Internet Application software Radio access networks
Content Type	Text
Resource Type	Article

Sl.	Authority	Responsibilities	Communication Details
1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
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