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| Content Provider | IEEE Xplore Digital Library |
|---|---|
| Author | Tamas-Selicean, D. Pop, P. |
| Copyright Year | 2011 |
| Abstract | In this paper we address the mapping of mixed-criticality hard real-time applications on distributed embedded architectures. We assume that the architecture provides both spatial and temporal partitioning, thus enforcing enough separation between applications. With temporal partitioning, each application runs in a separate partition, and each partition is allocated several time slots on the processors where the application is mapped. The sequence of time slots for all the applications on a processor are grouped within a Major Frame, which is repeated periodically. We assume that the applications are scheduled using static-cyclic scheduling. We are interested to determine the task mapping to processors, and the sequence and size of the time slots within the Major Frame on each processor, such that the applications are schedulable. We have proposed a Tabu Search-based approach to solve this optimization problem. The proposed algorithm has been evaluated using several synthetic and real-life benchmarks. |
| Starting Page | 282 |
| Ending Page | 283 |
| File Size | 273411 |
| Page Count | 2 |
| File Format | |
| ISBN | 9781457720055 |
| e-ISBN | 9780769545905 |
| DOI | 10.1109/PRDC.2011.42 |
| Language | English |
| Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Publisher Date | 2011-12-12 |
| Publisher Place | USA |
| Access Restriction | Subscribed |
| Rights Holder | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Subject Keyword | Real time systems Optimization Benchmark testing Program processors Schedules Aerospace electronics Computer architecture mapping real-time mixed-criticality embedded partitioning |
| Content Type | Text |
| Resource Type | Article |
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