NDLI: A Novel Collaborative Verification Environment for SoC Co-Verification

Content Provider	IEEE Xplore Digital Library
Author	Tun Li SiKun Li JinShan Yu Yang Guo
Copyright Year	2007
Description	Author affiliation: Nat. Univ. of Defense Technol., Changsha (Tun Li; SiKun Li; JinShan Yu; Yang Guo)
Abstract	We designs and implements a system-on-chip SW/HW co-verification environment SoC-Gen, which collaborates formal verification and simulation techniques for SoC co-verification. This paper first give an overview of SoC-Gen, and then focus on the simulation based verification environment: SoC-CBSHVE, which based on componential design and integration methodology The environment adopts automatic software, hardware and simulation wrappers. Simulator adopts asynchronous parallel algorithm and bus-based communication mechanism. Five data buses support verification components simulation communication. Standard message format and unify simulation interfaces easy SoC components design and verification. Experimental results show that SoC-CBSHVE enables easy debugging, rich portability, and high verification speed, at a low cost for system-on-chip system-level software and hardware co-verification.
Starting Page	145
Ending Page	150
File Size	430870
Page Count	6
File Format	PDF
ISBN	1424409624
DOI	10.1109/CSCWD.2007.4281425
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2007-04-26
Publisher Place	Australia
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Collaboration System-on-a-chip Hardware Formal verification Design methodology Parallel algorithms Data buses Costs Software debugging Software systems Components SoC Co-Verification
Content Type	Text
Resource Type	Article

Sl.	Authority	Responsibilities	Communication Details
1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
5	Website/Portal (Helpdesk)	Queries regarding NDLI and its services	support@ndl.gov.in
6	Contents and Copyright Issues	Queries related to content curation and copyright issues	content@ndl.gov.in
7	National Digital Library of India Club (NDLI Club)	Queries related to NDLI Club formation, support, user awareness program, seminar/symposium, collaboration, social media, promotion, and outreach	clubsupport@ndl.gov.in
8	Digital Preservation Centre (DPC)	Assistance with digitizing and archiving copyright-free printed books	dpc@ndl.gov.in
9	IDR Setup or Support	Queries related to establishment and support of Institutional Digital Repository (IDR) and IDR workshops	idr@ndl.gov.in

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