NDLI: Characterization of hot wall RTP for thin gate oxide films

Content Provider	IEEE Xplore Digital Library
Author	Ratliff, C. Schaefer, M. Senzaki, Y. Sisson, J. Barelli, C. Herring, R.
Copyright Year	2001
Description	Author affiliation: ASML Thermal Div., Scotts Valley, CA, USA (Ratliff, C.; Schaefer, M.; Senzaki, Y.; Sisson, J.; Barelli, C.; Herring, R.)
Abstract	We have developed single-wafer furnace RTP modules for thermal oxidation of silicon substrates. 20 /spl Aring/ dry oxide films were grown on 200 mm diameter Si wafers at 950/spl deg/C with within-wafer uniformity below 0.6% and wafer-to-wafer uniformity 0.5% (1/spl sigma/ standard deviation, 49 points with 1.5 mm edge exclusion) for 10 successive runs. Wet oxidation at 850/spl deg/C provides 25 /spl Aring/ oxide films with uniformity below 0.8% (1/spl sigma/). Thermal nitridation in nitric oxide (NO) and reoxidation can provide sub 25 /spl Aring/ oxides. For a 25 wafer repeatability experiment using 300 mm wafers, the average within wafer standard deviation of the thickness for a 20 /spl Aring/ gate oxide was 0.5% (1/spl sigma/, 49 points with 3 mm edge exclusion). The thermal stress within the silicon wafer is maintained at low levels shown with both in-situ thermal data and from post-process inspection. It is demonstrated that thin gate oxide films can be generated without the drawbacks associated with lamp based systems.
Starting Page	111
Ending Page	114
File Size	305080
Page Count	4
File Format	PDF
ISBN	0963825104
DOI	10.1109/RTP.2001.1013751
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2001-09-25
Publisher Place	USA
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Oxidation Furnaces Rapid thermal processing Thermal stresses Dielectrics Silicon Heating Temperature Substrates Semiconductor films
Content Type	Text
Resource Type	Article

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