NDLI: Design and simulation of an integrated optical CMOS heart rate sensor

Content Provider	IEEE Xplore Digital Library
Author	He, D. Liu, C. Trachanis, D. Hese, J.V. Drogoudis, D. Fummi, F. Stefanni, F. Guamieri, V. Morgan, S.P. Hayes-Gill, B.R.
Copyright Year	2014
Description	Author affiliation: Electr. & Opt. Res. Div., Univ. of Nottingham, Nottingham, UK (He, D.; Liu, C.; Morgan, S.P.; Hayes-Gill, B.R.) \|\| Agilent Technol. Belgium NV, NV, USA (Trachanis, D.; Hese, J.V.; Drogoudis, D.) \|\| EDALab s.r.l., Verona, Italy (Fummi, F.; Stefanni, F.; Guamieri, V.)
Abstract	An optical CMOS heart rate sensor that processes the photoplethysmographic signal was designed and fabricated in Austriamicrosystems 0.35μm CMOS process. The sensor consists of photodiode, transimpedance amplifier, analogue bandpass filters, analogue-to-digital converters, digital signal processor, and a timing circuit that is used to modulate the external light-emitting diodes. The mixed-signal simulation has been carried out to validate the system design. With modulated green light source and integrated lock-in detection the sensor is capable of extracting clean photoplethysmographic signal when it is operated in reflectance mode. The heart rate output was compared with commercial devices and they show a good agreement. The chip-level integration enables a small foot print of the design and makes it suitable for the applications of ambulatory monitoring.
Starting Page	1
Ending Page	4
File Size	273320
Page Count	4
File Format	PDF
ISBN	9781479954742
e-ISBN	9781479954759
DOI	10.1109/ASDAM.2014.6998713
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2014-10-20
Publisher Place	Slovakia
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Heart rate Light sources Green products Monitoring Semiconductor device modeling CMOS integrated circuits Light emitting diodes
Content Type	Text
Resource Type	Article

Sl.	Authority	Responsibilities	Communication Details
1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
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