NDLI: A novel four layers package-on-package stacking technique

Content Provider	IEEE Xplore Digital Library
Author	Shi Lingfeng Xiao Yuanming Zhang Ke Jia Jun Liu Chen Lai Xinquan
Copyright Year	2011
Description	Author affiliation: Institute of Electronic CAD, Xidian University, Xi'an, Shaanxi 710071, China (Shi Lingfeng; Zhang Ke) \|\| China Electronics Technology Group Corporation No.54 Research Institute, Shijiazhuang, Hebei 050081, China (Xiao Yuanming; Jia Jun) \|\| Key Lab of High-Speed Circuit Design and EMC, Ministry of Education, Xidian University, Xi'an, Shaanxi, 710071, China (Liu Chen; Lai Xinquan)
Abstract	Currently, the multilayer Package-on-Package (PoP) stacking technique as the mainstream 3D vertical packaging solution is extensively applied in the manufacture process of portable electronic instruments. While the warpages on the packages caused by the mismatch of the Coefficient of Thermal Expansion (CTE) and stiffness during the assembly and stacking processes are seriously threaten to the stability and reliability. In this paper, a novel four layers PoP stacking technique in which the number of memory die packaged are increased to twice of the traditional two layers PoP is presented. The metal cylinders with stable CTE are placed between the neighboring layers to reduce the warpages on the packages. The high memory density and excellent reliability could meet the requirements of the miniaturization and lightening of the portable instruments.
Starting Page	399
Ending Page	402
File Size	95390
Page Count	4
File Format	PDF
ISBN	9781467301480
ISSN	15505723
e-ISBN	9781467301497
DOI	10.1109/ISAPM.2011.6105739
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2011-10-25
Publisher Place	China
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Metals Stacking Packaging Materials Electronics packaging Memory management Reliability
Content Type	Text
Resource Type	Article

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