NDLI: Rapid prototyping of chassis control systems

Content Provider	IEEE Xplore Digital Library
Author	DePoyster, M.R. Hoying, J.F. Majeed, K.N.
Copyright Year	1996
Description	Author affiliation: Delphi Chassis Syst., Dayton, OH, USA (DePoyster, M.R.)
Abstract	The process of developing and testing chassis systems control algorithms has improved significantly from earlier methods. Previously, ideas were implemented in assembly language targeted for a fixed-point processor for real-time implementation in a vehicle controller. In this paper an example is presented that illustrates the use of rapid prototyping tools in the development of chassis control algorithms. The development of a new brake algorithm using a Simulink block diagram model is described. The multiprocessor development system employs a microprocessor-based brake controller acting as the master with a DSP-based dSPACE Autobox serving as a slave processor. The base braking algorithm resides in the microprocessor-based controller allowing utilization of all of the original brake system inputs and outputs. The advanced braking algorithm resides in the dSPACE Autobox. Sensor inputs are read by the brake controller and passed to the Autobox over a high speed optical CAN bus. The Autobox performs the necessary computations and sends the results back to the brake controller which adjusts the outputs accordingly. The development control system architecture is described in detail in the paper. The advantages of rapid prototyping over previous methods are also outlined with estimated savings in development time given.
Starting Page	141
Ending Page	145
File Size	464090
Page Count	5
File Format	PDF
ISBN	0780330323
DOI	10.1109/CACSD.1996.555250
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	1998-09-15
Publisher Place	USA
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Prototypes Control systems Optical sensors System testing Assembly Vehicles Master-slave Optical control High speed optical techniques Computer architecture
Content Type	Text
Resource Type	Article

Sl.	Authority	Responsibilities	Communication Details
1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
5	Website/Portal (Helpdesk)	Queries regarding NDLI and its services	support@ndl.gov.in
6	Contents and Copyright Issues	Queries related to content curation and copyright issues	content@ndl.gov.in
7	National Digital Library of India Club (NDLI Club)	Queries related to NDLI Club formation, support, user awareness program, seminar/symposium, collaboration, social media, promotion, and outreach	clubsupport@ndl.gov.in
8	Digital Preservation Centre (DPC)	Assistance with digitizing and archiving copyright-free printed books	dpc@ndl.gov.in
9	IDR Setup or Support	Queries related to establishment and support of Institutional Digital Repository (IDR) and IDR workshops	idr@ndl.gov.in

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