NDLI: Phase and delay extraction in Q/sup 2/PSK: ML receivers using systolic array processing

Content Provider	IEEE Xplore Digital Library
Author	Feiz, S. Soliman, S.S.
Copyright Year	1990
Description	Author affiliation: Dept. of Electr. Eng., Southern Methodist Univ., Dallas, TX, USA (Feiz, S.; Soliman, S.S.)
Abstract	A maximum likelihood decision-directed (MLDD) receiver structure is derived for a data-transmission system which employs quadrature-quadrature phase-shift keying (QQPSK) as the modulation scheme. The receiver is derived by treating the problems of sequence decision, sample timing, and carrier phase as a composite estimation problem. It is shown that the resulting maximum likelihood estimates are asymptotically unbiased. Cramer-Rao lower bounds are derived for the estimates and plotted for different cases. Symbol detection is carried out by means of a modified Viterbi algorithm, and a parallel structure is developed for estimating carrier phase and delay time for high-speed data transmission. It is shown that the resulting synchronizer can be simplified for application in data systems using QAM (quadrature amplitude modulation). Interaction between detection and synchronization is studied. It is shown that the parallel estimator is well-suited for high-speed digital signal processing and lends itself easily to systolic array implementation.<>
Starting Page	707
Ending Page	711
File Size	377220
Page Count	5
File Format	PDF
DOI	10.1109/ICC.1990.117169
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	1990-04-16
Publisher Place	USA
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Maximum likelihood detection Maximum likelihood estimation Phase estimation Delay estimation Quadrature amplitude modulation Phase shift keying Phase modulation Timing Phase detection Viterbi algorithm
Content Type	Text
Resource Type	Article

Sl.	Authority	Responsibilities	Communication Details
1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
5	Website/Portal (Helpdesk)	Queries regarding NDLI and its services	support@ndl.gov.in
6	Contents and Copyright Issues	Queries related to content curation and copyright issues	content@ndl.gov.in
7	National Digital Library of India Club (NDLI Club)	Queries related to NDLI Club formation, support, user awareness program, seminar/symposium, collaboration, social media, promotion, and outreach	clubsupport@ndl.gov.in
8	Digital Preservation Centre (DPC)	Assistance with digitizing and archiving copyright-free printed books	dpc@ndl.gov.in
9	IDR Setup or Support	Queries related to establishment and support of Institutional Digital Repository (IDR) and IDR workshops	idr@ndl.gov.in

Dual stage carrier phase estimation for 16-QAM systems based on a modified QPSK-partitioning algorithm

Maximum-likelihood modulation classification for PSK/QAM

On efficient multiplier-free implementation of channel estimation and equalization

Maximum likelihood detection of differentially encoded PSK signals transmitted over Rayleigh frequency-flat fading channels

Adaptive ML neural network based receiver for Q/sup 2/PSK modulated data-transmission systems

Approximate ML decoding of coded PSK with no explicit carrier phase reference

M-QAM carrier phase recovery using the viterbi-viterbi monomial-based and maximum Likelihood Estimators

Improved feedforward ML timing estimation for PSK signaling

Feedforward ML-based timing estimation with PSK signals

Phase and delay extraction in Q/sup 2/PSK: ML receivers using systolic array processing

Similar Documents

Dual stage carrier phase estimation for 16-QAM systems based on a modified QPSK-partitioning algorithm

Maximum-likelihood modulation classification for PSK/QAM

On efficient multiplier-free implementation of channel estimation and equalization

Maximum likelihood detection of differentially encoded PSK signals transmitted over Rayleigh frequency-flat fading channels

Adaptive ML neural network based receiver for Q/sup 2/PSK modulated data-transmission systems

Approximate ML decoding of coded PSK with no explicit carrier phase reference

M-QAM carrier phase recovery using the viterbi-viterbi monomial-based and maximum Likelihood Estimators

Improved feedforward ML timing estimation for PSK signaling

Feedforward ML-based timing estimation with PSK signals

Phase and delay extraction in Q/sup 2/PSK: ML receivers using systolic array processing