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| Content Provider | IEEE Xplore Digital Library |
|---|---|
| Author | Katevenis, M. Passas, G. |
| Copyright Year | 2005 |
| Description | Author affiliation: Inst. of Comput. Sci., Foundation for Res. & Technol., Crete, Greece (Katevenis, M.; Passas, G.) |
| Abstract | Buffered crossbars can directly switch variable size packets, but require large cross point buffers to do so, especially when jumbo frames are to he supported. When this is not feasible, segmentation and reassembly (SAR) must be used. We propose a novel SAR scheme for buffered crossbars that uses variable-size segments while merging multiple packets (or fragments thereof) into each segment. This scheme eliminates padding overhead, reduces header overhead, reduces crosspoint buffer size and is suitable for use with external, modern DRAM buffer memory in the ingress line cards. We evaluate the new scheme using simulation, and show that it outperforms existing segmentation schemes in buffered as well as unbuffered crossbars. We also study how the size of the maximum segment affects system performance. |
| Starting Page | 999 |
| Ending Page | 1004 |
| File Size | 135540 |
| Page Count | 6 |
| File Format | |
| ISBN | 0780389387 |
| DOI | 10.1109/ICC.2005.1494499 |
| Language | English |
| Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Publisher Date | 2005-05-16 |
| Publisher Place | South Korea |
| Access Restriction | Subscribed |
| Rights Holder | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Subject Keyword | Switches Packet switching Computer architecture Routing Computer science Merging Random access memory System performance Fabrics Costs |
| Content Type | Text |
| Resource Type | Article |
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