NDLI: Transistor Realization of Reversible TSG Gate and Reversible Adder Architectures

Content Provider	IEEE Xplore Digital Library
Author	Thapliyal, H. Vinod, A.P.
Copyright Year	2006
Description	Author affiliation: Sch. of Comput. Eng., Nanyang Technol. Univ., Singapore (Thapliyal, H.)
Abstract	Reversible logic is emerging as a promising technology with applications in design of low power arithmetic and data path units for digital signal processing (DSP), quantum computing, nanotechnology, and optical computing. In this paper, the transistor realization of a new 4*4 reversible gate called "TSG" gate is presented. The proposed TSG gate has the ability to operate as a reversible full adder i.e. reversible full adder is implemented using a single gate. The transistor realizations of 1-bit reversible full adder, reversible ripple carry adder and reversible carry skip adder are also presented. In order to have the reduced transistor overhead of reversible carry skip adder, its modified design has been proposed. We also demonstrate a method to minimize the overhead in transistor implementation of reversible arithmetic units. The transistor implementation of reversible arithmetic circuits presented in this paper finds extensive applications in computationally intensive DSP tasks
Starting Page	418
Ending Page	421
File Size	240277
Page Count	4
File Format	PDF
ISBN	1424403871
DOI	10.1109/APCCAS.2006.342478
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2006-12-04
Publisher Place	Singapore
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Adders Digital signal processing Quantum computing Optical computing Computer architecture Logic design Optical design Signal design Digital arithmetic Nanotechnology Reversible Adders Reversible Logic
Content Type	Text
Resource Type	Article

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