NDLI: Non-idealities in analog circuits design: What does it really mean?

Content Provider	IEEE Xplore Digital Library
Author	Guerrero-Linares, L. Sandoval-Ibarra, F. Loo-Yau, J.R.
Copyright Year	2012
Description	Author affiliation: Centro de Enseñanza Técnica Industrial, CETI, Guadalajara, MEXICO (Guerrero-Linares, L.) \|\| Cinvestav-Guadalajara Unit, Zapopan, MEXICO (Sandoval-Ibarra, F.; Loo-Yau, J.R.)
Abstract	The aim of this contribution is to show why sources of non-idealities are actually a concept of reason in order to define tradeoffs in the design of analog circuits. A tradeoff is commonly picked up from an analytical design-model, which tries to explain a given phenomenon under study by using physical theories underlying the role of non-idealities in the design of accurate analog-circuits. Since accuracy is commonly used as a measure rule for minimizing the unwanted effect of non-idealities on the circuit performance, this paper underlines that non-idealities reported in open literature shown that any analog circuit is designed in a custom way, in which just some non-idealities are minimized in order to fulfill specific design specifications, i.e. sources of non-idealities do not necessarily include all existing ones but just those affecting -according the experience of the designer - the circuit's performance. Thus, what non-idealities have to be minimized in an analog circuit design is a question usually answered by reachable tradeoffs. This paper addresses difficulties (i.e. open problems) about silicon-based analog circuit design. So, analog design is not art, but an engineering activity supported in physical theories. Analog design demands not only accurate design models, and suitable simulation tools, but also a well-defined design methodology, elsewhere trial-and-error practices force to the analog-circuit designer to include substantial design margin and risk yield loss, and also provide little design knowledge.
Starting Page	586
Ending Page	589
File Size	501519
Page Count	4
File Format	PDF
ISBN	9781467325264
ISSN	15483746
e-ISBN	9781467325271
e-ISBN	9781467325257
DOI	10.1109/MWSCAS.2012.6292088
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2012-08-05
Publisher Place	USA
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Analog circuits Transistors Integrated circuit modeling Layout Solid modeling Accuracy CMOS integrated circuits
Content Type	Text
Resource Type	Article
Subject	Electronic, Optical and Magnetic Materials Electrical and Electronic Engineering

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