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| Content Provider | IEEE Xplore Digital Library |
|---|---|
| Author | Tanzi, N. |
| Copyright Year | 1994 |
| Description | Author affiliation: Dept. of Electr. & Comput. Eng., Illinois Inst. of Technol., Chicago, IL, USA (Tanzi, N.) |
| Abstract | A methodology which permits one to determine the required input and output termination impedances of a given transistor such that the amplifier can simultaneously meet power gain, noise figure, and input and output VSWR constraints is described. To support the proposed method, an amplifier design example at 2 GHz with power gain, noise figure, and input and output VSWR constraints is presented. The applicability of the design methodology to the design of broad-band, low-noise amplifier design is demonstrated with three examples. |
| Starting Page | 1215 |
| Ending Page | 1219 |
| File Size | 333038 |
| Page Count | 5 |
| File Format | |
| ISBN | 0780324285 |
| DOI | 10.1109/MWSCAS.1994.519027 |
| Language | English |
| Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Publisher Date | 1994-08-03 |
| Publisher Place | USA |
| Access Restriction | Subscribed |
| Rights Holder | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Subject Keyword | Microwave transistors Microwave amplifiers Low-noise amplifiers Noise figure Power amplifiers Transducers Impedance matching Equations Design methodology Process design |
| Content Type | Text |
| Resource Type | Article |
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