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| Content Provider | IEEE Xplore Digital Library |
|---|---|
| Author | Hafliger, P. Kolle Riis, H. |
| Copyright Year | 2003 |
| Description | Author affiliation: Inst. of Informatics, Oslo Univ., Norway (Hafliger, P.; Kolle Riis, H.) |
| Abstract | This paper introduces a static multi-level memory cell that was conceived to store state variables in neuromorphic on-chip learning applications. It consists of a capacitance that holds a voltage and an array of 'fusing' amplifiers that are connected as followers. These followers drive their output towards the voltage level of the input like normal followers, but only if the difference between input and output is smaller than about 120 mV. The inputs to this 'fusing' follower array determine the stable voltage levels of the memory cell. All follower-outputs are connected to the storage capacitance and thus the voltage is always driven to the closest stable level. The cell content can be changed by injecting current into the capacitance. This form of storage offers arguably a better compromise between desirable and undesirable properties for neuromorphic learning systems than alternative solutions (e.g. non-volatile analog storage on floating gates or digital static storage in combination with AD/DA conversion). |
| Sponsorship | IEEE Circuits & Syst. Soc Mahanakorn Univ. Technol |
| File Size | 279572 |
| File Format | |
| ISBN | 0780377613 |
| DOI | 10.1109/ISCAS.2003.1205491 |
| Language | English |
| Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Publisher Date | 2003-05-25 |
| Publisher Place | Thailand |
| Access Restriction | Subscribed |
| Rights Holder | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Subject Keyword | Voltage Nonvolatile memory Capacitance Neuromorphics Tunneling Learning systems Biological neural networks Nervous system Circuits Read only memory |
| Content Type | Text |
| Resource Type | Article |
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