NDLI: A temperature independent trimmable current source

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On power allocation for generalized cyclic-prefix based channel-equalizers

An improved peak-to-average-power ratio reduction algorithm for multicarrier communications

Subspace estimation-based constrained optimization method for multipath CDMA channels

Enhancing robustness of information hiding against interference of communication with turbo code

Successive packing based interleaver design for turbo codes

A parallel fast algorithm of Volterra adaptive filters

An improved stochastic model for the least mean fourth (LMF) adaptive algorithm

A piecewise linear dynamical functional artificial neural network (PWL-DFANN) for nonlinear adaptive time series prediction

Learning characteristics of adaptive fault tolerant filters in the presence of transient errors

Pipelined RLS adaptive architecture using relaxed Givens rotations (RGR)

Third-generation and beyond (3.5G) wireless networks and its applications

Adaptive playout for real-time media streaming

Robust video multicast under rate and channel variability with applications to wireless LANs

Adaptive end-to-end optimization of mobile video streaming using QoS negotiation

Video transport over ad-hoc networks using multiple paths

Error robust video transmission over wireless IP networks with multiuser detection

A generalized methodology for lower-error area-efficient fixed-width multipliers

Design of low error CSD fixed-width multiplier

Extended results for minimum-adder constant integer multipliers

The use of reduced two's-complement representation in low-power DSP design

A carry-select-adder optimization technique for high-performance Booth-encoded Wallace-tree multipliers

Maximum achievable energy reduction using coding with applications to deep sub-micron buses

A novel analysis method of bus signal transmission and a proposal for high-speed low-power bus circuit

Energy-efficient and reliable low-swing signaling for on-chip buses based on redundant coding

On dynamic delay and repeater insertion

Inductance/area/resistance tradeoffs in high performance power distribution grids

A necessary and sufficient condition for mismatch shaping in multi-bit DACs

Design of oversampling current steering DAC with 640 MHz equivalent clock frequency

A differential DAC architecture with variable common-mode level

A general analysis on the timing jitter in D/A converters

A 14-bit, 40-MS/s DAC with current mode deglitcher

A very low-voltage (0.8 V) CMOS receiver frontend for 5 GHz RF applications

Charge sampling mixer with /spl Delta//spl Sigma/ quantized impulse response

Low noise, high linearity double-balanced active mixers using lossless feedback

GHz programmable dual-modulus prescaler for multi-standard wireless applications

A direct digital RF amplitude modulator

A substrate noise circuit for accurately testing mixed-signal ICs

Built-in self-test scheme for on-chip diagnosis, compliant with the IEEE 1149.4 mixed-signal test bus standard

A neural network approach for fault diagnosis of large-scale analogue circuits

The qualitative form of optimum transient test signals for analog circuits derived from control theory methods

Fault location of single-phase transmission lines by Laguerre function

A novel and efficient timing-driven global router for standard cell layout design based on critical network concept

On segmented channel routability

Gated direct sequence spread spectrum clocking scheme for multimedia systems

Wavelet method for high-speed clock tree simulation

Design flow of robust routed power distribution for low power ASIC

Space-time blind adaptive multiuser detection in antenna array CDMA systems

Suppression of bit-pulsed jammer signals in DS-CDMA array system using independent component analysis

Multiuser wavelet based MC-CDMA receiver with linearly constrained constant modulus IQRD-RLS algorithm

State space blind source recovery for mixtures of multiple source distributions

Wavelet denoising for highly noisy source separation

Adaptive antenna systems for mobile ad-hoc networks

Channel identification scheme for modified MC-CDMA systems with the mixing model of replicating and serial-to-parallel converting

Subspace-based estimation method of uplink FIR channel in MC-CDMA system without cyclic prefix over frequency-selective fading channel

Post-compensation of RF non-linearity in mobile OFDM systems by estimation of memory-less polynomial

Accurate CMOS implementation of PWL CNN neuron activations

Initiation and tracking of dim target via fusion of feature probabilities with CNN-UM

On the existence of stable equilibrium points in cellular neural networks

Progressive image reconstruction via cellular neural networks

The template optimization of discrete time CNN for image compression and reconstruction

Analysis of time-controlled switched systems using stability preserving mappings

Criteria for asymptotic stability of a class of discrete systems with multiple independent variables

Stabilizing linear time-invariant systems with finite-state hybrid static output feedback

Stability and linearization: discrete-time systems

The Cauchy-Floquet factorization by successive Riccati transformations

A trace-back-free Viterbi decoder using a new survival path management algorithm

Power reduction techniques for an OFDM burst synchronization core

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Low power SOVA architecture using bi-directional scheme

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Error spectrum shaping in closed-loop systems with state-estimate feedback controller

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An 1 V rail-rail low-power CMOS op-amp

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A reliable 5V OTA in 3.3V CMOS technology

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Large scale clock skew scheduling techniques for improved reliability of digital synchronous VLSI circuits

Optimal adaptive bandwidth monitoring for QoS based retrieval

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TDMA-based communication scheduling in system-on-chip video encoder

Recursive patching for video-on-demand (VOD) systems with limited client buffer constraint

Dynamic throughput estimation for wireless multimedia transmission

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Experimental detection of bifurcations and sliding in DC-DC power converters

An advanced design method of bursting in Fitzhugh-Nagumo model

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Step-response-based characterization of nonuniform perfect-reconstruction filter banks

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A new algorithm for QAM signal classification in AWGN channels

Further results on blind equalization and estimation of SIMO time-varying channels

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MIMO wireless channels made simple

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Low cost floating-point unit design for audio applications

Low-voltage asynchronous adders for low power and high speed applications

A novel floating-gate multiple-valued CMOS full-adder

Multi-valued logic function implementation with novel current-mode logic gates

Fast soft-output Viterbi decoding for duo-binary turbo codes

High-speed add-compare-select units using locally self-resetting CMOS

A reconfigurable superimposed 2D-mesh array for channel equalization

Enabling high-speed turbo-decoding through concurrent interleaving

High speed VLSI architecture design for block turbo decoder

Dynamic stage matching for parallel pipeline A/D converters

High-speed pipelined A/D converter using time-shifted CDS technique

A 115mW 12-bit 50 MSPS pipelined ADC

A pipelined A/D converter for high-speed and high-resolution application

Design of low-voltage CMOS pipelined ADCs using 1 pico-Joule of energy per conversion

Tutorial Guide. ISCAS 2001. IEEE International Symposium on Circuits and Systems (Cat. No.01TH8573)

ISCAS 2001. The 2001 IEEE International Symposium on Circuits and Systems (Cat. No.01CH37196)

2000 IEEE International Symposium on Circuits and Systems. Emerging Technologies for the 21st Century. Proceedings (IEEE Cat No.00CH36353)

ISCAS'99. Proceedings of the 1999 IEEE International Symposium on Circuits and Systems VLSI (Cat. No.99CH36349)

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A temperature independent trimmable current source

Content Provider	IEEE Xplore Digital Library
Author	Shah, S. Collins, S.
Copyright Year	2002
Description	Author affiliation: Dept. of Eng. Sci., Oxford Univ., UK (Shah, S.; Collins, S.)
Abstract	A non-volatile floating-gate MOSFET based trimmable current cell suitable for use in a current steering DAC and implemented in 0.35 /spl mu/m, 3.3 V CMOS technology is presented. The current source can be programmed to an accuracy corresponding to 12-bit resolution using either hot electron injection to add charge to the floating-gate or hot hole injection to remove charge. The output current from the circuit can be adjusted by 40% to overcome the relatively large variations in output current which arise when a MOSFET is biased with a low gate overdrive voltage (Vgs-Vt). This allows the circuit to be designed around the temperature invariant region to give an output which is temperature independent over a large trimming range. This circuit could therefore be ideally suited to operate in the uncertain thermal environment created when a DAC is incorporated within a system on chip.
Sponsorship	IEEE IEEE Circuits & Syst. Soc
File Size	369818
File Format	PDF
ISBN	0780374487
DOI	10.1109/ISCAS.2002.1009940
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2002-05-26
Publisher Place	USA
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Temperature Nonvolatile memory MOSFET circuits CMOS technology Secondary generated hot electron injection Hot carriers Low voltage System-on-a-chip Digital control Decoding
Content Type	Text
Resource Type	Article

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