NDLI: Extending an FET layout verification system to bipolar technology

Content Provider	IEEE Xplore Digital Library
Author	Gannett, J.W.
Copyright Year	1988
Description	Author affiliation: Bellcore, Morristown, NJ, USA (Gannett, J.W.)
Abstract	Rink, an automatic layout verification system intended for FET technologies, has been enhanced to handle bipolar designs. A straightforward procedure that uses Rink's parasitic capacitance extractor to solve the bipolar device identification problem is described. The bipolar enhancements to Rink have been used successfully on a set of seven high-speed bipolar chips designed for lightwave communication. These chips ranged in complexity from 23 to 67 devices. Full-custom, nonmanhattan layouts for these chips were created on polygon-pusher style layout editors. For each chip, Rink executed an automatic comparison of the netlist extracted from the layout against a SPICE reference netlist. The latter has been coded for SPICE design simulations. Several fatal connectivity errors were uncovered as were a few significant disparities in resistor values and transistor sizes.<>
Starting Page	183
Ending Page	186
File Size	445726
Page Count	4
File Format	PDF
DOI	10.1109/BIPOL.1988.51074
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	1988-09-12
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	FETs Integrated circuit technology Data mining Layout Graphics Parasitic capacitance Design automation Geometry Bipolar transistors Object recognition
Content Type	Text
Resource Type	Article

Sl.	Authority	Responsibilities	Communication Details
1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
5	Website/Portal (Helpdesk)	Queries regarding NDLI and its services	support@ndl.gov.in
6	Contents and Copyright Issues	Queries related to content curation and copyright issues	content@ndl.gov.in
7	National Digital Library of India Club (NDLI Club)	Queries related to NDLI Club formation, support, user awareness program, seminar/symposium, collaboration, social media, promotion, and outreach	clubsupport@ndl.gov.in
8	Digital Preservation Centre (DPC)	Assistance with digitizing and archiving copyright-free printed books	dpc@ndl.gov.in
9	IDR Setup or Support	Queries related to establishment and support of Institutional Digital Repository (IDR) and IDR workshops	idr@ndl.gov.in