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| Content Provider | IEEE Xplore Digital Library |
|---|---|
| Author | Chang, H. Kuen Fung Izzard, M. Scott, D. |
| Copyright Year | 1993 |
| Description | Author affiliation: Integrated Syst. Lab., Texas Instrum. Inc., Dallas, TX, USA (Chang, H.) |
| Abstract | As technology scales, the operating voltage of IC's will drop and chips on a common board may operate at different power supplies. In such a scenario, it becomes necessary for the high speed interface circuits to be not only compatible with a 3.3 V supply, but also with I/O levels of future chips that operate at even lower voltage supplies. This paper examines basic building blocks in communication designs operating at data rates above 2.5 Gbit/s. Our experimental results show that BiCMOS as a technology can be used to implement circuits operating at 2.5 V and below. |
| Starting Page | 99 |
| Ending Page | 102 |
| File Size | 402626 |
| Page Count | 4 |
| File Format | |
| ISBN | 078031316X |
| DOI | 10.1109/BIPOL.1994.587870 |
| Language | English |
| Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Publisher Date | 1994-10-10 |
| Access Restriction | Subscribed |
| Rights Holder | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Subject Keyword | BiCMOS integrated circuits Power supplies Low voltage Temperature Voltage control Feedback Instruments Integrated circuit technology CMOS technology Demultiplexing |
| Content Type | Text |
| Resource Type | Article |
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