NDLI: Flexible high performance architecture for boundary scan execution hardware

Content Provider	IEEE Xplore Digital Library
Author	Borroz, T.
Copyright Year	2015
Description	Author affiliation: Syst. Test Group, Teradyne, Inc., North Reading, MA, USA (Borroz, T.)
Abstract	IEEE 1149.1 boundary scan has become very popular since its introduction in the 1990s. It is now used routinely in defense and aerospace testing, and has become commonplace in new TPSes. But mil/aero quality requirements demand functional test as well. This means that boundary scan tests and functional tests must coexist in this environment. Boundary scan test requires access to the same UUT I/O signals as functional test. This is because many boundary scan tests, such as interconnect test, require control and observation of these signals to obtain full fault coverage. Functional test requires high-performance dynamic channels on the UUT I/O signals. The boundary scan requirements are less demanding. This paper proposes the use of configurable test hardware to address both requirements. This is technically achievable now that test systems can make use of FPGAs that can be efficiently reconfigured at run time. This paper proposes a boundary scan test architecture that can be combined with an existing functional test architecture in such a system. The boundary scan hardware architecture would be based on a specially designed processor optimized for boundary scan which would support up to 8 TAP ports. All available pins not used for TAP ports could be used for parallel I/O signals up to the constraints imposed by the limitations of the FPGA and fixturing. The custom processor could include throughput enhancing features such as pipelined double buffered DMA data transfer. With proper design, such a processor could run continuously as long as it was connected to a host computer that was fast enough to keep it supplied with data. Such a custom processor should be able to closely approach the device limited test time in throughput-critical situations, such as flash programming. It should be possible to straightforwardly control such hardware using a general purpose boundary scan runtime software library, which would present its client with an API that is conceptually similar to existing boundary scan languages like SVF and STAPL.
Sponsorship	IEEE Instrum. Meas. Soc.
Starting Page	232
Ending Page	235
File Size	731062
Page Count	4
File Format	PDF
e-ISBN	9781479981908
DOI	10.1109/AUTEST.2015.7356494
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2015-11-02
Publisher Place	USA
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Programming Hardware Field programmable gate arrays Pins Testing Ports (Computers) Flash memories DLTT Boundary scan JTAG IEEE 1149.1 Flash programming Device limited test time
Content Type	Text
Resource Type	Article

Sl.	Authority	Responsibilities	Communication Details
1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
5	Website/Portal (Helpdesk)	Queries regarding NDLI and its services	support@ndl.gov.in
6	Contents and Copyright Issues	Queries related to content curation and copyright issues	content@ndl.gov.in
7	National Digital Library of India Club (NDLI Club)	Queries related to NDLI Club formation, support, user awareness program, seminar/symposium, collaboration, social media, promotion, and outreach	clubsupport@ndl.gov.in
8	Digital Preservation Centre (DPC)	Assistance with digitizing and archiving copyright-free printed books	dpc@ndl.gov.in
9	IDR Setup or Support	Queries related to establishment and support of Institutional Digital Repository (IDR) and IDR workshops	idr@ndl.gov.in

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