NDLI: The integration of power supply components within standard cell integration circuits

Content Provider	IEEE Xplore Digital Library
Author	Nolan, J. Salt, T.
Copyright Year	1989
Description	Author affiliation: Sierra Semicond. Corp., San Jose, CA, USA (Nolan, J.; Salt, T.)
Abstract	The authors present aspects of the design of three standard-cell ASICs (application-specific integrated circuits). Each ASIC had an unusual power supply and I/O level requirement determined by its operating environment. The designs were completed using a highly automated procedure which included combining cells from Sierra's 1.5- mu m standard cell library with a few additional custom cells. The central core of each ASIC was constructed from the schematic by automatic place and route software and then surrounded by a ring of customized I/O and power management circuits. Through this method, the broad variety of available standard cells was employed, simulated, and operated in the 5.0-V CMOS electrical conditions for which they were originally designed. They were protected from the destructive stresses of the actual application of the ASICs by the custom cells. Two of the design examples are of on-chip voltage regulation with digital I/O level translation, and the third is an example of power supply extraction from the ASIC's TTL-compatible inputs, while eliminating the internal V/sub DD/ losses resulting from voltage drops of diode rectifiers.<>
File Size	327137
File Format	PDF
DOI	10.1109/ASIC.1989.123246
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	1989-09-25
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Power supplies Application specific integrated circuits Software libraries Energy management Circuit simulation Protection Stress Voltage control Diodes Rectifiers
Content Type	Text
Resource Type	Article

Sl.	Authority	Responsibilities	Communication Details
1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
5	Website/Portal (Helpdesk)	Queries regarding NDLI and its services	support@ndl.gov.in
6	Contents and Copyright Issues	Queries related to content curation and copyright issues	content@ndl.gov.in
7	National Digital Library of India Club (NDLI Club)	Queries related to NDLI Club formation, support, user awareness program, seminar/symposium, collaboration, social media, promotion, and outreach	clubsupport@ndl.gov.in
8	Digital Preservation Centre (DPC)	Assistance with digitizing and archiving copyright-free printed books	dpc@ndl.gov.in
9	IDR Setup or Support	Queries related to establishment and support of Institutional Digital Repository (IDR) and IDR workshops	idr@ndl.gov.in