NDLI: Experience with 1 to 3 megahertz power conversion using eGaN FETs

Content Provider	IEEE Xplore Digital Library
Author	Yin Wang Woochan Kim Zhemin Zhang Calata, J. Ngo, K.D.T.
Copyright Year	2013
Description	Author affiliation: Bradley Dept. of Electr. & Comput. Eng., Virginia Tech, Blacksburg, VA, USA (Yin Wang; Woochan Kim; Zhemin Zhang; Calata, J.; Ngo, K.D.T.)
Abstract	Earlier planning and subsequent experience are described for the development of a 50-W, 300-Vdc power converter with power density targeted at 100 $W/in^{3}$ and efficiency targeted at 95%. To achieve the desired power density, 3 - 5 MHz switching frequency was attempted, necessitating the choice of commercial $eGaN^{®}$ (enhancement-mode GaN FETs). Three-level isolated ZVS (Zero-Voltage-Switched) converter topologies were selected to best utilize with the 200-V ratings of the 5-MHz switches. A stacked gate driver is thus discussed for the three-level converter. For relative permeability below 50 needed by the magnetic components, magnetic powder has high core loss while gapped ferrites leads to high winding loss. Thus, a low-temperature process was developed to synthesize polymer-coated magnetic powder with permeability similar to that of commercial magnetic powder, but with loss approaching ferrites' loss. Constant-flux magnetic concept is described in companion papers as means to improve power density. Owing to the high reverse on-voltage of $eGaN^{®},$ synchronous rectification is not a clear winner unless gate timing is precisely controlled. Experimental results at 3 MHz show that inverter's efficiency approaches 95% and dc-dc converter's efficiency approaches 85% at half the voltage rating of the $eGaN^{®}$ FETs.
Sponsorship	IEEE Power Electron. Soc.
Starting Page	532
Ending Page	539
File Size	1862933
Page Count	8
File Format	PDF
ISBN	9781467343541
ISSN	10482334
e-ISBN	9781467343558
e-ISBN	9781467343534
DOI	10.1109/APEC.2013.6520261
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2013-03-17
Publisher Place	USA
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Logic gates Field effect transistors Magnetic cores Powders Core loss Permeability Materials
Content Type	Text
Resource Type	Article

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1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
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4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
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