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| Content Provider | IEEE Xplore Digital Library |
|---|---|
| Author | Carmona, J. Cortadella, J. Pastor, E. |
| Copyright Year | 2001 |
| Description | Author affiliation: Dept. of Software, Univ. Politecnica de Catalunya, Barcelona, Spain (Carmona, J.) |
| Abstract | This paper presents a method for the automatic synthesis of asynchronous circuits from Petri net specifications. The method is based on a structural encoding of the system in such a way that a circuit implementation is always guaranteed. Moreover, a set of transformations is presented for the subclass of Free-Choice Petri nets that enables the exploration of different solutions. All transformations preserve the property of free-choiceness, thus enabling the use of structural methods for the synthesis of asynchronous circuits. Preliminary experimental results indicate that the quality of the circuits is comparable to that obtained by methods that require an exhaustive enumeration of the state space. This novel synthesis method opens the door to the synthesis of large control specifications generated from hardware description languages. |
| Sponsorship | IEEE Circuits & Syst. Soc. |
| Starting Page | 157 |
| Ending Page | 166 |
| File Size | 330790 |
| Page Count | 10 |
| File Format | |
| ISBN | 076951071X |
| DOI | 10.1109/CSD.2001.981773 |
| Language | English |
| Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Publisher Date | 2001-06-25 |
| Publisher Place | UK |
| Access Restriction | Subscribed |
| Rights Holder | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Subject Keyword | Encoding Circuit synthesis Asynchronous circuits Control system synthesis State-space methods Hardware design languages Clocks Automatic control Minimization Explosions |
| Content Type | Text |
| Resource Type | Article |
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