NDLI: A high data rate, low power all-digital correlation circuit design

Content Provider	IEEE Xplore Digital Library
Author	Current, K. Douglas Mow Youssef-Digaleh, S.
Copyright Year	1979
Description	Author affiliation: University of California, Davis, CA (Current, K.)
Abstract	Correlation techniques are widely used in analog and digital signal processing; e.g. in optiman receiver design. In this paper, a new digital output correlator circuit design is proposed. The correlation results are presented as a binary count of the number of bits in agreement between 31-bit reference and input sequences. Correlation results could be presented at data rates up to about 50MHz. The proposed new circuit could be implemented in a high speed bipolar transistor technology as a monolithic large-scale-integrated circuit with a power dissipation of about .5 watts. A novel pipelined 31-bit digital summing circuit will be presented that employs new multivalued, multithresholded latching and counting circuits in the formation of its binary-coded output. Comparisons with an all-binary digital correlator circuit are made.
Starting Page	859
Ending Page	862
File Size	96266
Page Count	4
File Format	PDF
DOI	10.1109/ICASSP.1979.1170609
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	1979-04-02
Publisher Place	USA
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Circuit synthesis Correlators Large scale integration Logic devices Signal design Logic design Logic circuits Signal processing Multivalued logic Digital signal processing
Content Type	Text
Resource Type	Article

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1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
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