NDLI: A precorrected-FFT approach for capacitance extraction of general three-dimensional structures

Content Provider	IEEE Xplore Digital Library
Author	Xiaochun Nie Lewei Li Ning Yuan
Copyright Year	2001
Description	Author affiliation: Nat. Univ. of Singapore, Singapore (Xiaochun Nie)
Abstract	In the design of high performance integrated circuits and integrated circuit packaging, there are many cases where the self and coupling capacitances are important for determining final circuit speeds or functionality. The traditional boundary-element technique and Gaussian elimination for solving the integral equation associated with the capacitance extraction problem require O(N/sup 3/) operations and O(N/sup 2/) memory storage. These approaches become computationally intractable when a large number of elements are used, thus limiting the size of the problem that can be analyzed. In this paper, a generalized conjugate residual iterative technique is used to solve the linear system arising from the discretization, and a precorrected-FFT method is then employed to accelerate the matrix-vector products in the iterates. This technique requires O(NlogN) operations and O(N) memory storage to perform a potential calculation.
Starting Page	28
Ending Page	31
File Size	194276
Page Count	4
File Format	PDF
ISBN	0780370708
DOI	10.1109/APS.2001.960023
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2001-07-08
Publisher Place	USA
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Capacitance Testing Conductors Character generation Linear systems Acceleration Equations Vectors High speed integrated circuits Integrated circuit packaging
Content Type	Text
Resource Type	Article

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