NDLI: A Watt-Level Stacked-FET Linear Power Amplifier in Silicon-on-Insulator CMOS

Content Provider	IEEE Xplore Digital Library
Author	Pornpromlikit, S. Jinho Jeong Presti, C.D. Scuderi, A. Asbeck, P.M.
Copyright Year	1963
Abstract	A single-stage stacked field-effect transistor (FET) linear power amplifier (PA) is demonstrated using 0.28-¿m 2.5-V standard I/O FETs in a 0.13-¿m silicon-on-insulator (SOI) CMOS technology. To overcome the low breakdown voltage limit of MOSFETs, a stacked-FET structure is employed, where four transistors are connected in series so that their output voltage swings are added in phase. With a 6.5-V supply, the measured PA achieves a small-signal gain of 14.6 dB, a saturated output power of 32.4 dBm, and a maximum power-added efficiency (PAE) of 47% at 1.9 GHz. Using a reverse-link IS-95 code division multiple access modulated signal, the PA shows an average output power of up to 28.7 dBm with a PAE of 41.2% while meeting the adjacent channel power ratio requirement. Using an uplink wideband code division multiple access modulated signal, the PA shows an average output power of up to 29.4 dBm with a PAE of 41.4% while meeting the adjacent channel leakage ratio requirement. The stacked-FET PA is designed to withstand up to 9 V of supply voltage before reaching its breakdown limit. This is the first reported stacked-FET linear PA in submicrometer SOI CMOS technology that delivers watt-level output power in the gigahertz frequency range with efficiency and linearity performance comparable to those of GaAs-based PAs.
Sponsorship	IEEE Microwave Theory and Techniques Society
Starting Page	57
Ending Page	64
Page Count	8
File Size	1431751
File Format	PDF
ISSN	00189480
Volume Number	58
Issue Number	1
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2010-01-01
Publisher Place	U.S.A.
Access Restriction	One Nation One Subscription (ONOS)
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Power amplifiers Silicon on insulator technology CMOS technology Power generation FETs Breakdown voltage MOSFETs Multiaccess communication Modulation coding Power measurement wideband code division multiple access (WCDMA) CMOS code division multiple access (CDMA) power amplifier (PA) silicon-on-insulator (SOI) stacked transistors
Content Type	Text
Resource Type	Article
Subject	Condensed Matter Physics Electrical and Electronic Engineering Radiation

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4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
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