NDLI: A Switching Logic Digitizer for Analog-to-Digital Conversion

Content Provider	IEEE Xplore Digital Library
Author	Powell, I.A. Perold, W.J.
Copyright Year	2002
Abstract	The design and simulation of a complementary output switching logic (COSL) compatible, voltage state, switching logic comparator (SLC), and a flash analog-to-digital converter (ADC) for high-speed applications, with multigigahertz input bandwidth, is presented. A detailed design for the SLC is provided and verified with simulations. The comparator is then optimized utilizing Monte Carlo yield predictions. The optimized comparator is incorporated into the construction of a 4-bit quantizer of an ADC. The Gray-code output is converted into binary using COSL gates. The functionality, linearity, maximum input bandwidth, and dynamic range of the 4-bit ADC is verified by simulation, using a number of special input waveforms. The performance of the comparator and the 4-bit ADC are also evaluated with thermal noise incorporated into simulations. Beat frequency simulations and Fourier spectra are also used in the evaluation of the ADC performance. A fully functional 4-bit ADC, with a maximum input bandwidth of 10 GHz for a clock speed of 20 GHz, was achieved through simulations. Beat frequency simulations revealed that the comparators have an input bandwidth greater than 19 GHz with sufficient dynamic range for an ADC of greater than 6 bits of resolution. Due to the fact that the aperture time for the ADC is dependent on the rise time of the sampling pulse and not the width of the pulse, a much smaller aperture time is obtained which directly translates to higher input bandwidth.
Sponsorship	Council on Superconductivity Appl. Superconductivity Conference Inc MIT
Starting Page	3886
Ending Page	3896
Page Count	11
File Size	818027
File Format	PDF
ISSN	10518223
Volume Number	17
Issue Number	4
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2007-12-01
Publisher Place	U.S.A.
Access Restriction	One Nation One Subscription (ONOS)
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Analog-digital conversion Bandwidth Logic design Dynamic range Frequency Apertures Space vector pulse width modulation Voltage Monte Carlo methods Linearity superconducting devices Analog–digital conversion (ADC) Monte Carlo yield optimization
Content Type	Text
Resource Type	Article
Subject	Condensed Matter Physics Electronic, Optical and Magnetic Materials Electrical and Electronic Engineering

Sl.	Authority	Responsibilities	Communication Details
1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
5	Website/Portal (Helpdesk)	Queries regarding NDLI and its services	support@ndl.gov.in
6	Contents and Copyright Issues	Queries related to content curation and copyright issues	content@ndl.gov.in
7	National Digital Library of India Club (NDLI Club)	Queries related to NDLI Club formation, support, user awareness program, seminar/symposium, collaboration, social media, promotion, and outreach	clubsupport@ndl.gov.in
8	Digital Preservation Centre (DPC)	Assistance with digitizing and archiving copyright-free printed books	dpc@ndl.gov.in
9	IDR Setup or Support	Queries related to establishment and support of Institutional Digital Repository (IDR) and IDR workshops	idr@ndl.gov.in

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