NDLI: Synthesis of low-power DSP systems using a genetic algorithm

Content Provider	IEEE Xplore Digital Library
Author	Bright, M.S. Arslan, T.
Copyright Year	1997
Abstract	This paper presents a new tool for the synthesis of low-power VLSI designs, specifically, those designs targeting digital signal processing applications. The synthesis tool genetic algorithm for low-power synthesis (GALOPS) uses a genetic algorithm to apply power-reducing transformations to high-level signal-processing designs, producing designs that satisfy power requirements as well as timing and area constraints. GALOPS uses problem-specific genetic operators that are specifically tailored to incorporate VLSI-based digital signal processing design knowledge. A number of signal-processing benchmarks are used to facilitate the analysis of low-power design tools, and to aid in the comparison of results. Results demonstrate that GALOPS achieves significant power reductions in the presented benchmark designs. In addition, GALOPS produces a family of unique solutions for each design, all of which satisfy the multiple design objectives, providing flexibility to the VLSI designer.
Starting Page	27
Ending Page	40
Page Count	14
File Size	210103
File Format	PDF
ISSN	1089778X
Volume Number	5
Issue Number	1
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2001-02-01
Publisher Place	U.S.A.
Access Restriction	One Nation One Subscription (ONOS)
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Digital signal processing Genetic algorithms Very large scale integration Signal design Signal synthesis Algorithm design and analysis Circuit synthesis Speech synthesis High level synthesis Timing
Content Type	Text
Resource Type	Article
Subject	Theoretical Computer Science Computational Theory and Mathematics Software

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