NDLI: Partial-response maximum-likelihood core development for a CD/DVD controller integrated circuit

Content Provider	IEEE Xplore Digital Library
Author	Sonu, G. Nadershahi, N. Radzewicz, S. Young-Mook Kim Jae-Wook Lee Daeyun Shim Cho, K.O. Hyucheol Park Kiwon Lee Hyun-Soo Park Jae-Seong Shim
Copyright Year	1965
Abstract	A new PRML architecture is presented to demonstrate its superiority over the conventional analog channel in a DVD system. In this new architecture, the robustness to the baseline disturbance in the readback signal is emphasized in developing the algorithms for the PLL, digital gain control, asymmetry control, adaptive FIR filter, and Viterbi detector and post processor. In addition, a method of modeling the asymmetrical readback signal is discussed. A new algorithm for the digital PLL is described which does not require the oversampling. A simple method is presented to reduce the asymmetry in the ADC samples. To further improve the sensitivity to the baseline wandering, a Viterbi detector is designed using the difference metric approach and followed by a post processor, which corrects the baseline related errors from the VD. A test chip is fabricated using 0.35 /spl mu/m CMOS technology to demonstrate the performance of the proposed architecture.
Sponsorship	IEEE Magnetics Society
Starting Page	663
Ending Page	669
Page Count	7
File Size	215615
File Format	PDF
ISSN	00189464
Volume Number	37
Issue Number	2
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2001-03-01
Publisher Place	U.S.A.
Access Restriction	One Nation One Subscription (ONOS)
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	DVD Phase locked loops Viterbi algorithm Detectors CMOS technology Maximum likelihood detection Robust control Signal processing Gain control Programmable control
Content Type	Text
Resource Type	Article
Subject	Electronic, Optical and Magnetic Materials Electrical and Electronic Engineering

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1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
5	Website/Portal (Helpdesk)	Queries regarding NDLI and its services	support@ndl.gov.in
6	Contents and Copyright Issues	Queries related to content curation and copyright issues	content@ndl.gov.in
7	National Digital Library of India Club (NDLI Club)	Queries related to NDLI Club formation, support, user awareness program, seminar/symposium, collaboration, social media, promotion, and outreach	clubsupport@ndl.gov.in
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9	IDR Setup or Support	Queries related to establishment and support of Institutional Digital Repository (IDR) and IDR workshops	idr@ndl.gov.in

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