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| Content Provider | IEEE Xplore Digital Library |
|---|---|
| Author | Eng, K.Y. Karol, M.J. Yeh, Y.-S. |
| Copyright Year | 1972 |
| Abstract | The problem of designing a large high-performance, broadband packet of ATM (asynchronous transfer mode) switch is discussed. Ways to construct arbitrarily large switches out of modest-size packet switches without sacrificing overall delay/throughput performance are presented. A growable switch architecture is presented that is based on three key principles: a generalized knockout principle exploits the statistical behaviour of packet arrivals and thereby reduces the interconnect complexity, output queuing yields the best possible delay/throughput performance, and distributed intelligence in routing packets through the interconnect fabric eliminates internal path conflicts. Features of the architecture include the guarantee of first-in-first-out packet sequence, broadcast and multicast capabilities, and compatibility with variable-length packets, which avoids the need for packet-size standardization. As a broadband ISDN example, a 2048*2048 configuration with building blocks of 42*16 packet switch modules and 128*128 interconnect modules, both of which fall within existing hardware capabilities, is presented.< |
| Starting Page | 423 |
| Ending Page | 430 |
| Page Count | 8 |
| File Size | 876114 |
| File Format | |
| ISSN | 00906778 |
| Volume Number | 40 |
| Issue Number | 2 |
| Language | English |
| Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Publisher Date | 1992-02-01 |
| Publisher Place | U.S.A. |
| Access Restriction | One Nation One Subscription (ONOS) |
| Rights Holder | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Subject Keyword | Switches Asynchronous transfer mode Packet switching Delay Throughput Routing Fabrics Broadcasting Standardization B-ISDN |
| Content Type | Text |
| Resource Type | Article |
| Subject | Electrical and Electronic Engineering |
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