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| Content Provider | IEEE Xplore Digital Library |
|---|---|
| Author | Hui, J. Arthurs, E. |
| Copyright Year | 1983 |
| Abstract | This paper gives a broadband (total throughput approaching 1 terabit/s) self-routing packet switch design for providing flexible multiple bit-rate broadband services for an end-to-end fiber network. The switch fabric for the slotted broadband packet switch delivers exactly one packet to each output port from one of the input ports which request packet delivery to that output port. The denied requests would try again during the next slot. We discover an effective scheme, implemented by CMOS VLSI with manageable complexity, for performing this function. First, each input port sends a request for a port destination through a Batcher Sorting network, which sorts the request destinations in ascending order so that we may easily purge all but one request for the same destination. The winning request acknowledges its originating port from the output of the Batcher network, with the acknowledgment routed through a Batcher-banyan selfrouting switch. The acknowledged input port then sends the full packet through the same Batcher-banyan switch without any conflict. Unacknowledged ports buffer the blocked packet for reentry in the next cycle. We also give several variations for significantly improved performance. We then study switch performance based on some rudimentary protocols for traffic control. For the basic scheme, we analyze the throughput-delay characteristics for random traffic, modeled by random output port requests and a binomial distribution of packet arrival. We demonstrate with a buffer size of around 20 packets, we can achieve a 50 percent loading with almost no buffer overflow. Maximum throughput of switch is 58 percent. Next, we investigate the performance of the switch in the presence of periodic broadband traffic. We then apply circuit switching techniques and packet priority for high bit-rate services in our packet switch environment. We improve the throughput per port to close to 100 percent by means of parallel switch fabric, while maintaining the periodic nature of the traffic. |
| Starting Page | 1264 |
| Ending Page | 1273 |
| Page Count | 10 |
| File Size | 982278 |
| File Format | |
| ISSN | 07338716 |
| Volume Number | 5 |
| Issue Number | 8 |
| Language | English |
| Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Publisher Date | 1987-10-01 |
| Publisher Place | U.S.A. |
| Access Restriction | One Nation One Subscription (ONOS) |
| Rights Holder | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Subject Keyword | Switches Packet switching Throughput Fabrics Traffic control Switching circuits Very large scale integration Sorting Protocols Buffer overflow |
| Content Type | Text |
| Resource Type | Article |
| Subject | Computer Networks and Communications Electrical and Electronic Engineering |
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