NDLI: Analysis and Suppression of Alias in Digitally Controlled Inverters

Content Provider	IEEE Xplore Digital Library
Author	Rui Li Bangyin Liu Shanxu Duan Changyue Zou Ling Jiang
Copyright Year	2005
Abstract	In digitally controlled inverters, the output voltage and current contain high-frequency harmonics due to the switching process. Unfortunately, the sampling frequency is often less than twice the bandwidth of measurement signal. Then, the aliasing phenomenon is brought into the sampling process and some low-frequency alias signals which cause power quality deterioration are produced. This paper presents a quantitative analysis to reveal the characteristic of the aliasing phenomenon in digitally controlled inverters. Specifically, the magnitude of alias signal will drop to zero and the phase will be inversed with some special sampling delays. Two alias suppression methods are then proposed by controlling the sampling delay. Steady-state error and low-frequency harmonics are significantly decreased with the proposed methods. The proposed methods have little delay so that the system has a better dynamic performance. The theoretical analysis and alias suppression strategies are validated by experimental results.
Sponsorship	IEEE Industrial Electronics Society
Starting Page	655
Ending Page	665
Page Count	11
File Size	2592256
File Format	PDF
ISSN	15513203
Volume Number	10
Issue Number	1
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2014-01-01
Publisher Place	U.S.A.
Access Restriction	One Nation One Subscription (ONOS)
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Harmonic analysis Power harmonic filters Inverters Delays Frequency control Voltage control Switching frequency total harmonic distortion (THD) Alias digital control inverter sampling delay
Content Type	Text
Resource Type	Article
Subject	Control and Systems Engineering Information Systems Electrical and Electronic Engineering Computer Science Applications

Sl.	Authority	Responsibilities	Communication Details
1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
5	Website/Portal (Helpdesk)	Queries regarding NDLI and its services	support@ndl.gov.in
6	Contents and Copyright Issues	Queries related to content curation and copyright issues	content@ndl.gov.in
7	National Digital Library of India Club (NDLI Club)	Queries related to NDLI Club formation, support, user awareness program, seminar/symposium, collaboration, social media, promotion, and outreach	clubsupport@ndl.gov.in
8	Digital Preservation Centre (DPC)	Assistance with digitizing and archiving copyright-free printed books	dpc@ndl.gov.in
9	IDR Setup or Support	Queries related to establishment and support of Institutional Digital Repository (IDR) and IDR workshops	idr@ndl.gov.in

Influence of Delay on System Stability and Delay Optimization of Grid-Connected Inverters With LCL Filter

Suppression of line voltage related distortion in current controlled grid connected inverters

Digital Control of a Multi-Phase Interleaved PWM Inverter with Minimal Total Harmonic Distortion

Analysis of output characteristics of three-phase voltage source inverter with hysteresis control

Improved Current Control of Three-Phase Grid-Connected Inverter Systems Under the Grid Voltage Distortions

A single-phase grid-connected PV inverter with improved grid-connected current

Modulation Technique for Low Frequency Harmonic Cancellation in Auxiliary Railway Power Supplies

Harmonics optimization of the voltage balancing control for multilevel converter/inverter systems

THD Minimization Applied Directly on the Line-to-Line Voltage of Multilevel Inverters

Analysis and Suppression of Alias in Digitally Controlled Inverters

Similar Documents

Influence of Delay on System Stability and Delay Optimization of Grid-Connected Inverters With LCL Filter

Suppression of line voltage related distortion in current controlled grid connected inverters

Digital Control of a Multi-Phase Interleaved PWM Inverter with Minimal Total Harmonic Distortion

Analysis of output characteristics of three-phase voltage source inverter with hysteresis control

Improved Current Control of Three-Phase Grid-Connected Inverter Systems Under the Grid Voltage Distortions

A single-phase grid-connected PV inverter with improved grid-connected current

Modulation Technique for Low Frequency Harmonic Cancellation in Auxiliary Railway Power Supplies

Harmonics optimization of the voltage balancing control for multilevel converter/inverter systems

THD Minimization Applied Directly on the Line-to-Line Voltage of Multilevel Inverters

Analysis and Suppression of Alias in Digitally Controlled Inverters