NDLI: PEG-C: Performance Enhancement Guaranteed Cache for Hard Real-Time Systems

Content Provider	IEEE Xplore Digital Library
Author	Yijie Huangfu Wei Zhang
Copyright Year	2009
Abstract	This letter designs the performance enhancement guaranteed cache (PEG-C) for hard real-time systems. The PEG-C uses two counters to monitor the number of hits and misses at runtime to improve the average-case performance, while guaranteeing the worst-case execution time (WCET). Our experiments indicate that with a few preloaded instructions, a PEG instruction cache can achieve the same average-case performance as a regular instruction cache while ensuring performance enhancement even in the worst case.
Starting Page	17
Ending Page	20
Page Count	4
File Size	532917
File Format	PDF
ISSN	19430663
Volume Number	6
Issue Number	2
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2014-01-01
Publisher Place	U.S.A.
Access Restriction	One Nation One Subscription (ONOS)
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Benchmark testing Real-time systems Radiation detectors Runtime Context Monitoring Cache memory real-time systems
Content Type	Text
Resource Type	Article
Subject	Control and Systems Engineering Computer Science

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PEG-C: Performance Enhancement Guaranteed Cache for Hard Real-Time Systems