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| Content Provider | IEEE Xplore Digital Library |
|---|---|
| Author | Wen-Hao Liu Yih-Lang Li |
| Copyright Year | 1982 |
| Abstract | Traditional solutions to antenna effect, such as jumper insertion and diode insertion performed at post-route stage may produce extra vias and degrade circuit performance. Previous work suggests combining layer assignment, jumper insertion, and diode insertion together to achieve a better design quality with less additional cost. Based on our observations on global and local antenna violations, this paper proposes an antenna-safe single-net layer assignment (AS-SLA), which first enumerates all antenna-safe layer assignment solutions of a net, and then extracts the minimum-cost one for the net. AS-SLA can minimize via count and separators as well. In addition, an antenna avoidance layer assignment flow (AALA) adopting AS-SLA as its kernel not only avoids global antenna violations, but also eliminates local antenna violations. Experimental results reveal that, in 16 benchmarks, AALA can yield ten antenna-violation-free assignments, while the algorithms of other works yield no antenna-violation-free assignment. However, AALA performs about seven times slower than other antenna-aware layer assignment algorithm. Accordingly, two acceleration techniques are proposed to reduce the runtime of AALA by 57.6%. |
| Sponsorship | IEEE Council on Electronic Design Automation IEEE Circuits and Systems Society |
| Starting Page | 613 |
| Ending Page | 626 |
| Page Count | 14 |
| File Size | 1152681 |
| File Format | |
| ISSN | 02780070 |
| Volume Number | 33 |
| Issue Number | 4 |
| Language | English |
| Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Publisher Date | 2014-01-01 |
| Publisher Place | U.S.A. |
| Access Restriction | One Nation One Subscription (ONOS) |
| Rights Holder | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Subject Keyword | Antennas Wires Routing Particle separators Logic gates Metals Pins separator Antenna effect design for manufacturability global routing layer assignment |
| Content Type | Text |
| Resource Type | Article |
| Subject | Computer Graphics and Computer-Aided Design Electrical and Electronic Engineering Software |
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