NDLI: SiGe Clock and Data Recovery System Based on Injection-Locked Oscillator for 100 Gbit/s Serial Data Link

Content Provider	IEEE Xplore Digital Library
Author	Béraud-Sudreau, Q. Begueret, J.-B. Mazouffre, O. Pignol, M. Baguena, L. Neveu, C. Deval, Y. Taris, T.
Copyright Year	1966
Abstract	Clock and data recovery (CDR) systems are the first logic blocks in serial data receivers and the latter's performance depends on the CDR. In this paper, a 100 Gbit/s CDR designed in 130 nm BiCMOS SiGe is presented. The CDR uses an injection locked oscillator (ILO) which delivers the 100 GHz clock. The inherent phase shift between the recovered clock and the incoming data is compensated by a feedback loop which performs phase and frequency tracking. Furthermore, a windowed phase comparator has been used, first to lower the classical number of gates, in order to prevent any delay skews between the different phase detector blocks, then to decrease the phase comparator operating frequency, and furthermore to extend the ability to track zero bit patterns The measurements results demonstrate a 100 GHz clock signal extracted from 50 Gb/s input data, with a phase noise as low as 98 dBc/Hz at 100 kHz offset from the carrier frequency. The rms jitter of the 25 GHz recovered data is only 1.2 ps. The power consumption is 1.4 W under 2.3 V power supply.
Sponsorship	IEEE Solid-State Circuits Society IEEE Electron Devices Society IEEE Circuits and Systems Society Japan Society of Applied Physics (JSAP) IEEE Microwave Theory and Techniques Society IEEE San Francisco Section Bay Area Council Univ. PA IEEE
Starting Page	1895
Ending Page	1904
Page Count	10
File Size	5447249
File Format	PDF
ISSN	00189200
Volume Number	49
Issue Number	9
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2014-01-01
Publisher Place	U.S.A.
Access Restriction	One Nation One Subscription (ONOS)
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Clocks Oscillators Phase locked loops Logic gates Detectors Voltage control Synchronization phase-locked loop (PLL) BiCMOS SiGe clock and data recovery (CDR) injection-locked oscillator (ILO) millimeter-wave data communication 100 Gb/s phase comparator
Content Type	Text
Resource Type	Article
Subject	Electrical and Electronic Engineering

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