NDLI: Sub-400<formula formulatype=inline><tex Notation=TeX>$^{circ}{rm C}~{rm Si}_{2}{rm H}_{6}$</tex> </formula> Passivation, <formula formulatype=inline><tex Notation=TeX>${rm HfO}_{2}$</tex></formula> Gate Dielectric, and Single TaN Metal Gate: A Common Gate Stack Technology for <formula formulatype=inline><tex Notation=TeX>${rm In}_{0.7}{rm Ga}_{0.3}{rm As}$</tex></formula> and <formula formulatype=inline><tex Notation=TeX>${rm Ge}_{1-x}{rm Sn}

Content Provider	IEEE Xplore Digital Library
Author	Xiao Gong Genquan Han Bin Liu Lanxiang Wang Wei Wang Yue Yang Kong, E.Y.-J. Shaojian Su Chunlai Xue Buwen Cheng Yee-Chia Yeo
Copyright Year	1963
Abstract	We report a novel common gate-stack solution for In_0.7Ga_0.3As n-channel metal-oxide-semiconductor field-effect transistors (nMOSFETs) and Ge_0.97Sn_0.03 p-channel metaloxide-semiconductor field-effect transistors (pMOSFETs), featuring sub-400 °C Si₂H₆ passivation, sub-1.75-nm capacitance equivalent thickness (CET), and single TaN metal gate. By incorporating Si₂H₆ passivation, an ultrathin SiO₂/Si interfacial layer is formed between the high-k gate dielectric and the high mobility InGaAs and GeSn channels. The In_0.7Ga_0.3As nMOSFET and Ge_0.97Sn_0.03 pMOSFET show drive currents of ~143 and ~69μA/μm, respectively, at \|V_DS\| and \|V_GS - V_TH\| of 1V for a gate length L_G of 4 μm. At an inversion carrier density N_inv of 10¹³ cm^-2, In_0.7Ga_0.3As nMOSFETs and Ge_0.97Sn_0.03 pMOSFETs show electron and hole mobilities of ~495 and ~230cm²/V·s, respectively. At N_inv of 4 × 10¹² cm^-2, electron and hole mobility values of ~705 and ~ 346cm²/V·s are achieved. Symmetric V_TH is realized by choosing a metal gate with midgap work function, and CET of less than 1.75nm is demonstrated with a gate-leakage current density (JG) of less than 10^-4A/cm² at a gate bias of V_TH ± 1V. Using this gate-stack, a Ge_0.95Sn_0.05 pMOSFET with the shortest L_G of 200nm is also realized. Drive current of ~680μA/μm is achieved at V_DS of -1.5V and V_GS - V_TH of -2V, with peak intrinsic transconductance G_m,int of ~492μS/μm at V_DS of -1.1V.
Sponsorship	IEEE Electron Devices Society
Starting Page	1640
Ending Page	1648
Page Count	9
File Size	2045781
File Format	PDF
ISSN	00189383
Volume Number	60
Issue Number	5
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2013-01-01
Publisher Place	U.S.A.
Access Restriction	One Nation One Subscription (ONOS)
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Logic gates MOSFETs Passivation Charge carrier processes InGaAs nMOSFET ${\rm Si}_{2}{\rm H}_{6}$ passivation GeSn pMOSFET
Content Type	Text
Resource Type	Article
Subject	Electronic, Optical and Magnetic Materials Electrical and Electronic Engineering

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