NDLI: 130-GHz On-Chip Meander Slot Antennas With Stacked Dielectric Resonators in Standard CMOS Technology

Content Provider	IEEE Xplore Digital Library
Author	Debin Hou Yong-Zhong Xiong Wang-Ling Goh Sanming Hu Wei Hong Madihian, M.
Copyright Year	1963
Abstract	This work discusses the design methodologies of 130-GHz high gain and high efficiency on-chip meander slot antennas in a standard CMOS technology. In the proposed structure, stacked dielectric resonators (DRs) are placed on the top of the on-chip feeding element to form series-fed antenna array for antenna gain and efficiency improvement. The integrated antenna with double stacked DRs achieved a measured gain of 4.7 dBi at 130 GHz with a bandwidth of 11%. The antenna size is 0.8 ×0.9 mm² and the simulation results indicate a radiation efficiency of 43%. To the best of our knowledge, this is the first demonstration of an on-chip antenna gain and efficiency enhancement through stacked DRs.
Sponsorship	IEEE Antennas and Propagation Society
Starting Page	4102
Ending Page	4109
Page Count	8
File Size	1976313
File Format	PDF
ISSN	0018926X
Volume Number	60
Issue Number	9
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2012-09-01
Publisher Place	U.S.A.
Access Restriction	One Nation One Subscription (ONOS)
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	System-on-a-chip Antenna measurements Gain Dielectric resonator antennas Arrays Dielectrics silicon CMOS dielectric resonator antenna (DRA) millimetre wave on-chip antenna
Content Type	Text
Resource Type	Article
Subject	Condensed Matter Physics Electrical and Electronic Engineering

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