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| Content Provider | IEEE Xplore Digital Library |
|---|---|
| Author | Adhikari, S.P. Changju Yang Hyongsuk Kim Chua, L.O. |
| Copyright Year | 2012 |
| Abstract | Analog hardware architecture of a memristor bridge synapse-based multilayer neural network and its learning scheme is proposed. The use of memristor bridge synapse in the proposed architecture solves one of the major problems, regarding nonvolatile weight storage in analog neural network implementations. To compensate for the spatial nonuniformity and nonideal response of the memristor bridge synapse, a modified chip-in-the-loop learning scheme suitable for the proposed neural network architecture is also proposed. In the proposed method, the initial learning is conducted in software, and the behavior of the software-trained network is learned by the hardware network by learning each of the single-layered neurons of the network independently. The forward calculation of the single-layered neuron learning is implemented on circuit hardware, and followed by a weight updating phase assisted by a host computer. Unlike conventional chip-in-the-loop learning, the need for the readout of synaptic weights for calculating weight updates in each epoch is eliminated by virtue of the memristor bridge synapse and the proposed learning scheme. The hardware architecture along with the successful implementation of proposed learning on a three-bit parity network, and on a car detection network is also presented. |
| Page Count | 10 |
| File Size | 1340099 |
| Starting Page | 1426 |
| Ending Page | 1435 |
| File Format | |
| ISSN | 2162237X |
| Volume Number | 23 |
| Issue Number | 9 |
| Language | English |
| Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Publisher Date | 2012-01-01 |
| Publisher Place | U.S.A. |
| Access Restriction | One Nation One Subscription (ONOS) |
| Rights Holder | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Subject Keyword | Memristors Bridge circuits Biological neural networks Neurons Hardware Nonhomogeneous media neural network Chip-in-the-loop memristor memristor bridge synapse |
| Content Type | Text |
| Resource Type | Article |
| Subject | Artificial Intelligence Computer Networks and Communications Computer Science Applications Software |
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