NDLI: Interfacial-Layer-Driven Dielectric Degradation and Breakdown of HfSiON/SiON Gate Dielectric nMOSFETs

Content Provider	IEEE Xplore Digital Library
Author	Do-Young Choi Kyong Taek Lee Chang-Ki Baek Chang Woo Sohn Hyun Chul Sagong Eui-Young Jung Jeong-Soo Lee Yoon-Ha Jeong
Copyright Year	1980
Abstract	This letter describes the dielectric degradation and breakdown characteristics of HfSiON/SiON gate dielectric nMOSFETs using the stress-induced leakage current (SILC) analysis. The nMOSFETs show progressive breakdown (PBD) under substrate injection stress, and its characteristic changes as the stress voltage increases, from slow PBD (s-PBD) only, then to a combination of s-PBD and fast PBD (f-PBD), and finally to f-PBD only. It is found that the SILC of nMOSFETs is caused by trap-assisted tunneling mainly through the preexisting deep traps of the high- k layer and the stress-induced traps of the interfacial layer (IL). The stress-induced defects under substrate injection stress are generated within the IL rather than the high- k layer, and the time-dependent dielectric breakdown of the nMOSFETs is driven by the degradation of the IL.
Sponsorship	IEEE Electron Devices Society
Starting Page	1319
Ending Page	1321
Page Count	3
File Size	465270
File Format	PDF
ISSN	07413106
Volume Number	32
Issue Number	10
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2011-10-01
Publisher Place	U.S.A.
Access Restriction	One Nation One Subscription (ONOS)
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	MOSFETs Dielectrics Stress Logic gates High K dielectric materials Electric breakdown Degradation time-dependent dielectric breakdown (TDDB) HfSiON high-$k$ dielectric interfacial layer (IL) positive bias temperature instability (BTI) (PBTI) reliability SiON stress-induced leakage current (SILC)
Content Type	Text
Resource Type	Article
Subject	Electronic, Optical and Magnetic Materials Electrical and Electronic Engineering

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