NDLI: Co-Optimization and Analysis of Signal, Power, and Thermal Interconnects in 3-D ICs

Content Provider	IEEE Xplore Digital Library
Author	Young-Joon Lee Sung Kyu Lim
Copyright Year	1982
Abstract	Heat removal and power delivery have become two major reliability concerns in 3-D integrated circuit (IC) technology. To alleviate thermal problem, two possible solutions have been proposed: thermal-through-silicon-vias (T-TSVs) and micro-fluidic channel (MFC)-based cooling. In case of power delivery, a complex power distribution network is required to deliver currents reliably to all parts of the 3-D IC while suppressing the power supply noise to an acceptable level. However, these thermal and power networks pose major challenges in signal routability and congestion. This is because signal, power, and thermal interconnects are all competing for routing space, and the related TSVs interfere with gates and wires in each die. We present a co-optimization methodology for signal, power, and thermal interconnects in 3-D ICs based on design of experiments (DOE) and response surface methodology (RSM). The goal of our holistic approach is to improve signal, thermal, and power noise metrics and to provide fast and accurate design space exploration for early design stage. We also provide an in-depth comparison between T-TSV versus MFC-based cooling method and discuss how to employ DOE and RSM techniques to co-optimize the interconnects. Our DOE-based optimization found the optimal design point with less effort than a gradient search-based optimization.
Sponsorship	IEEE Council on Electronic Design Automation IEEE Circuits and Systems Society
Starting Page	1635
Ending Page	1648
Page Count	14
File Size	1303521
File Format	PDF
ISSN	02780070
Volume Number	30
Issue Number	11
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2011-11-01
Publisher Place	U.S.A.
Access Restriction	One Nation One Subscription (ONOS)
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Design for experiments Through-silicon vias US Department of Energy Silicon Thermal analysis Three dimensional displays through-silicon-via 3-D IC design of experiments micro-fluidic channel response surface methodology
Content Type	Text
Resource Type	Article
Subject	Computer Graphics and Computer-Aided Design Electrical and Electronic Engineering Software

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4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
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