NDLI: A multi-band OFDM ultra-wideband SoC in 90 nm CMOS technology

Content Provider	IEEE Xplore Digital Library
Author	Do-Hoon Kim Kyu-Min Kang Chungyong Lee
Copyright Year	1975
Abstract	We present a multi-band orthogonal frequency division multiplexing (MB-OFDM) ultrawideband (UWB) system on chip (SoC) for high speed wireless communications. The UWB SoC has a power management scheme to minimize the average power consumption and adopts hardware-efficient parallel processing architecture to reduce the logic gate count of the modem. Specifically, symbol synchronization block is implemented with the signed algorithm; automatic gain control (AGC), carrier frequency offset (CFO) estimation, and preamble delimitation check block share the eight complex multipliers during preamble transmission; and AGC, fast Fourier transform (FFT), symbol synchronization, CFO estimation, and preamble delimitation check blocks share the buffer which contains received symbols. This SoC adopts a 32-bit reduced instruction set computer (RISC) processor for high speed data transaction and supports universal serial bus (USB) 2.0 and secure digital input/output (SDIO) for host interface. The designed SoC is implemented with 90 nm CMOS technology with a core voltage of 1.2 V. The implemented chip size is about 5 mm x 5 mm¹.
Sponsorship	IEEE Consumer Electronics Society
File Size	2979893
File Format	PDF
ISSN	00983063
Volume Number	57
Issue Number	3
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2011-08-01
Publisher Place	U.S.A.
Access Restriction	One Nation One Subscription (ONOS)
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	System-on-a-chip OFDM Synchronization Correlators Estimation Power demand Clocks power management Ultra-wideband (UWB) multi-bandorthogonal frequency division multiplexing (MB-OFDM) systemon chip (SoC) synchronization
Content Type	Text
Resource Type	Article
Subject	Electrical and Electronic Engineering Media Technology

Sl.	Authority	Responsibilities	Communication Details
1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
5	Website/Portal (Helpdesk)	Queries regarding NDLI and its services	support@ndl.gov.in
6	Contents and Copyright Issues	Queries related to content curation and copyright issues	content@ndl.gov.in
7	National Digital Library of India Club (NDLI Club)	Queries related to NDLI Club formation, support, user awareness program, seminar/symposium, collaboration, social media, promotion, and outreach	clubsupport@ndl.gov.in
8	Digital Preservation Centre (DPC)	Assistance with digitizing and archiving copyright-free printed books	dpc@ndl.gov.in
9	IDR Setup or Support	Queries related to establishment and support of Institutional Digital Repository (IDR) and IDR workshops	idr@ndl.gov.in

A Synchronization Design for UWB-Based Wireless Multimedia Systems

Symbol timing synchronization for ultra-wideband (UWB) multi-band OFDM (MB-OFDM) systems

RF Transmitter in 90-nm CMOS for Multi-Band OFDM UWB Application

Hardware implementation of an improved fine CFO synchronization for MB-OFDM UWB

Implementation of low power MB-OFDM PHY baseband modem with parallel architecture

An enhanced dual carrier modulation for performance improvement in WiMedia UWB systems

A CMOS 90 nm 55 mW 3.4-to-9.2 GHz 12 Band Frequency Synthesizer for MB-OFDM UWB

Design of Voltage controlled oscillator (VCO) for ultra wideband (UWB) CMOS frequency synthesizer

A Fully Differential Band-Selective Low-Noise Amplifier for MB-OFDM UWB Receivers

A multi-band OFDM ultra-wideband SoC in 90 nm CMOS technology

Similar Documents

A Synchronization Design for UWB-Based Wireless Multimedia Systems

Symbol timing synchronization for ultra-wideband (UWB) multi-band OFDM (MB-OFDM) systems

RF Transmitter in 90-nm CMOS for Multi-Band OFDM UWB Application

Hardware implementation of an improved fine CFO synchronization for MB-OFDM UWB

Implementation of low power MB-OFDM PHY baseband modem with parallel architecture

An enhanced dual carrier modulation for performance improvement in WiMedia UWB systems

A CMOS 90 nm 55 mW 3.4-to-9.2 GHz 12 Band Frequency Synthesizer for MB-OFDM UWB

Design of Voltage controlled oscillator (VCO) for ultra wideband (UWB) CMOS frequency synthesizer

A Fully Differential Band-Selective Low-Noise Amplifier for MB-OFDM UWB Receivers

A multi-band OFDM ultra-wideband SoC in 90 nm CMOS technology