NDLI: Complete Extraction of Trap Densities in Poly-Si Thin-Film Transistors

Content Provider	IEEE Xplore Digital Library
Author	Kimura, M. Yoshino, T. Harada, K.
Copyright Year	1963
Abstract	We have developed a technique to completely extract trap densities at front- and back-insulator interfaces and grain boundaries in poly-Si thin-film transistors. First, the trap densities at the front- and back-insulator interfaces are extracted from the front and back low-frequency capacitance-voltage characteristics using the Poisson and carrier-density equations. Next, the trap density at the grain boundaries is extracted from a current-voltage characteristic using 2-D device simulation. Particularly, in this paper, actual trap densities are extracted to evaluate oxygen and hydrogen plasma treatments. First, it is found that the energy profiles of these trap densities are quite different. Next, the oxygen plasma treatment has the effect to reduce trap densities but cannot diffuse to the back-insulator interface. Finally, it is concluded that this extraction technique is useful to evaluate film properties, diagnose fabrication processes, and improve transistor characteristics.
Sponsorship	IEEE Electron Devices Society
Starting Page	3426
Ending Page	3433
Page Count	8
File Size	773163
File Format	PDF
ISSN	00189383
Volume Number	57
Issue Number	12
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2010-12-01
Publisher Place	U.S.A.
Access Restriction	One Nation One Subscription (ONOS)
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Plasmas Insulators Grain boundaries Thin film transistors Electric potential Electron traps Silicon trap density Extraction poly-Si thin-film transistors (TFTs)
Content Type	Text
Resource Type	Article
Subject	Electronic, Optical and Magnetic Materials Electrical and Electronic Engineering

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