NDLI: Two high-performance and low-power serial communication interfaces for on-chip interconnects

Content Provider	IEEE Xplore Digital Library
Author	Saneei, M. Afzali-Kusha, A. Pedram, M.
Copyright Year	2003
Abstract	This paper presents two novel methods for on-chip serial communication in which the clocks of the transmitter and the receiver are generated with two separate ring oscillators. These oscillators are identical, although they can have a small frequency difference. In the first method, a strobe line that toggles exactly once with every frame of n-bit data is used to activate the oscillators. Local counters are used to count the number of bits in the data frame and to stop the local oscillators when the frame has been processed. In the second method, a single physical line is used to transmit both data and (in-band) control information, further reducing the power dissipation. The data transmission is controlled by the output of a starter flip-flop that indicates the empty/full state of an input buffer, whereas the data reception is controlled by the decoding of a "1" start bit and a "0" end bit, both of which are added to the n-bit data word to form a frame. Circuit simulation results demonstrate that both communication methods have high bandwidth and low power dissipation.
Starting Page	49
Ending Page	56
Page Count	8
File Size	980728
File Format	PDF
ISSN	08408688
Volume Number	34
Issue Number	1 and 2
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE) Canada
Publisher Date	2009-01-01
Publisher Place	Canada
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Power dissipation Integrated circuit interconnections Clocks Transmitters Ring oscillators Frequency Counting circuits Local oscillators Data communication Flip-flops chip communication; low-power communication; metastability error; serial communication
Content Type	Text
Resource Type	Article
Subject	Electrical and Electronic Engineering Hardware and Architecture

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