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| Content Provider | IEEE Xplore Digital Library |
|---|---|
| Author | Ito, T. Okada, K. Masu, K. |
| Copyright Year | 2004 |
| Abstract | This paper proposes a novel calculation method to derive self and mutual components of each segment in multiport inductors. In the proposed method, a set of S-parameters of the multiport inductor is mathematically decomposed into several matrices, which express self and mutual effects of each segment in the inductor. Due to this mathematics-based method, the multiport inductor can be characterized without numerical extractions. In this paper, a small-area distributed amplifier (DA) utilizing five-port inductors is also demonstrated as an application of the proposed analysis method. In the experimental results using a 0.18-mum CMOS process, the three-stage DA utilizing two five-port inductors to replace eight two-port inductors shows that the multiport inductor can successfully reduce layout area. |
| Sponsorship | IEEE Circuits and Systems Society |
| Starting Page | 1590 |
| Ending Page | 1597 |
| Page Count | 8 |
| File Size | 1403719 |
| File Format | |
| ISSN | 15498328 |
| Volume Number | 56 |
| Issue Number | 8 |
| Language | English |
| Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Publisher Date | 2009-08-01 |
| Publisher Place | U.S.A. |
| Access Restriction | One Nation One Subscription (ONOS) |
| Rights Holder | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Subject Keyword | Inductors Radio frequency Indium tin oxide Distributed amplifiers CMOS process Educational technology Low-noise amplifiers Wireless communication Analog circuits Equivalent circuits radio frequency (RF) CMOS distributed amplifier (DA) low-noise amplifier (LNA) multiport inductor on-chip inductor |
| Content Type | Text |
| Resource Type | Article |
| Subject | Electrical and Electronic Engineering Hardware and Architecture |
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