NDLI: Partially Adaptive STAP using the FRACTA Algorithm

Content Provider	IEEE Xplore Digital Library
Author	Shackelford, A.K. Gerlach, K. Blunt, S.D.
Copyright Year	1965
Abstract	A partially adaptive space-time adaptive processor (STAP) utilizing the recently developed FRACTA algorithm is presented which significantly reduces the high computational complexity and large sample support requirements of fully adaptive STAP. Multi-window post-Doppler dimensionality reduction techniques are employed to transform the data prior to application of the FRACTA algorithm. The FRACTA algorithm is a reiterative censoring (RC) and detection algorithm which has been shown to provide excellent detection performance in nonhomogeneous interference environments. Two multi-window post-Doppler dimensionality reduction techniques are considered: PRI-staggered and adjacent-bin. The partially adaptive FRACTA algorithm is applied to the KASSPER I (knowledge-aided sensor signal processing & expert reasoning) challenge datacube. The pulse repetition interval (PRI)-staggered approach with D=6 filters per Doppler bin is found to provide the best detection performance, outperforming the fully adaptive case while simultaneously reducing the runtime by a factor of ten. Using this implementation, partially adaptive FRACTA detects 197 out of 268 targets with one false alarm. The clairvoyant processor (the covariance matrix for each range cell is known) detects 198 targets with one false alarm. In addition, the partially adaptive FRACTA algorithm is shown to be resilient to jamming, and performs well for reduced sample support situations. When compared with partially adaptive STAP using traditional sliding window processing (SWP), the runtime of partially adaptive FRACTA is 14 times faster, and the detection performance is significantly increased (SWP detects 46 out of 268 targets with one false alarm).
Starting Page	58
Ending Page	69
Page Count	12
File Size	1600791
File Format	PDF
ISSN	00189251
Volume Number	45
Issue Number	1
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2009-01-01
Publisher Place	U.S.A.
Access Restriction	One Nation One Subscription (ONOS)
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Signal processing algorithms Training data Covariance matrix Clutter Runtime Jamming Maximum likelihood detection Maximum likelihood estimation Interference suppression Laboratories
Content Type	Text
Resource Type	Article
Subject	Electrical and Electronic Engineering Aerospace Engineering

Sl.	Authority	Responsibilities	Communication Details
1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
5	Website/Portal (Helpdesk)	Queries regarding NDLI and its services	support@ndl.gov.in
6	Contents and Copyright Issues	Queries related to content curation and copyright issues	content@ndl.gov.in
7	National Digital Library of India Club (NDLI Club)	Queries related to NDLI Club formation, support, user awareness program, seminar/symposium, collaboration, social media, promotion, and outreach	clubsupport@ndl.gov.in
8	Digital Preservation Centre (DPC)	Assistance with digitizing and archiving copyright-free printed books	dpc@ndl.gov.in
9	IDR Setup or Support	Queries related to establishment and support of Institutional Digital Repository (IDR) and IDR workshops	idr@ndl.gov.in

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