NDLI: A Hardware Approach to Real-Time Program Trace Compression for Embedded Processors

Content Provider	IEEE Xplore Digital Library
Author	Chung-Fu Kao Shyh-Ming Huang Huang, I.-J.
Copyright Year	2004
Abstract	Collecting the program execution traces at full speed is essential to the analysis and debugging of real-time software behavior of a complex system. However, the generation rate and the size of real-time program traces are so huge such that real-time program tracing is often infeasible without proper hardware support. This paper presents a hardware approach to compress program execution traces in real time in order to reduce the trace size. The approach consists of three modularized phases: 1) branch/target filtering; 2) branch/target address encoding; 3) Lempel-Ziv (LZ)-based data compression. A synthesizable RTL code for the proposed hardware is constructed to analyze the hardware cost and speed and typical multimedia benchmarks are used to measure the compression results. The results show that our hardware is capable of real-time compression and achieving compression ratio of 454:1, far better than 5:1 achieved by typical existing hardware approaches. Furthermore, our modularized approach makes it possible to trade off between the hardware cost (typically from 1 to 50K gates) and the achievable compression ratio (typically from 5:1 to 454:1)
Sponsorship	IEEE Circuits and Systems Society
Starting Page	530
Ending Page	543
Page Count	14
File Size	971767
File Format	PDF
ISSN	15498328
Volume Number	54
Issue Number	3
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2007-03-01
Publisher Place	U.S.A.
Access Restriction	One Nation One Subscription (ONOS)
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Hardware Costs Software debugging Filtering Encoding Data compression Microprocessors Data acquisition Computer science Real time systems microprocessor Address trace compressor debugging real time
Content Type	Text
Resource Type	Article
Subject	Electrical and Electronic Engineering Hardware and Architecture

Sl.	Authority	Responsibilities	Communication Details
1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
5	Website/Portal (Helpdesk)	Queries regarding NDLI and its services	support@ndl.gov.in
6	Contents and Copyright Issues	Queries related to content curation and copyright issues	content@ndl.gov.in
7	National Digital Library of India Club (NDLI Club)	Queries related to NDLI Club formation, support, user awareness program, seminar/symposium, collaboration, social media, promotion, and outreach	clubsupport@ndl.gov.in
8	Digital Preservation Centre (DPC)	Assistance with digitizing and archiving copyright-free printed books	dpc@ndl.gov.in
9	IDR Setup or Support	Queries related to establishment and support of Institutional Digital Repository (IDR) and IDR workshops	idr@ndl.gov.in

Using Branch Predictors and Variable Encoding for On-the-Fly Program Tracing

A Reverse-Encoding-Based On-Chip Bus Tracer for Efficient Circular-Buffer Utilization

VRTX: A Real-Time Operating System for Embedded Microprocessor Applications

Caches and Predictors for Real-Time, Unobtrusive, and Cost-Effective Program Tracing in Embedded Systems

The TX1 32-bit microprocessor: performance analysis, and debugging support

Code Compression for Embedded Systems Using Separated Dictionaries

Software Design for Real-Time Multiprocessor VMEbus Systems

HASTI: hardware-assisted functional testing of embedded processors in idle times

Hardware-Assisted Run-Time Monitoring for Secure Program Execution on Embedded Processors

A Hardware Approach to Real-Time Program Trace Compression for Embedded Processors

Similar Documents

Using Branch Predictors and Variable Encoding for On-the-Fly Program Tracing

A Reverse-Encoding-Based On-Chip Bus Tracer for Efficient Circular-Buffer Utilization

VRTX: A Real-Time Operating System for Embedded Microprocessor Applications

Caches and Predictors for Real-Time, Unobtrusive, and Cost-Effective Program Tracing in Embedded Systems

The TX1 32-bit microprocessor: performance analysis, and debugging support

Code Compression for Embedded Systems Using Separated Dictionaries

Software Design for Real-Time Multiprocessor VMEbus Systems

HASTI: hardware-assisted functional testing of embedded processors in idle times

Hardware-Assisted Run-Time Monitoring for Secure Program Execution on Embedded Processors

A Hardware Approach to Real-Time Program Trace Compression for Embedded Processors