NDLI: A 5 GHz, 192.6 dBc/Hz/mW FOM, LC–VCO System With Amplitude Control Loop and LDO Voltage Regulator in 0.18 <formula formulatype=inline><tex>$mu$</tex></formula>m CMOS

Content Provider	IEEE Xplore Digital Library
Author	Tsung-Hsien Lin Ruei-Lin Hsu Cheng-Lung Li Ying-Che Tseng
Copyright Year	2001
Abstract	To reduce phase noise degradation from oscillator tail current sources, this letter presents an inductor-capacitor voltage-controlled oscillator (LC-VCO) biased by triode metal-oxide-semiconductor transistors. The VCO system also includes an amplitude control loop and a voltage regulator to endure process, voltage, and temperature variations and to enhance power supply rejection ratio. Fabricated in a 0.18 mum CMOS process, the measured results show the adopted topology achieves a better phase noise than the conventional saturation current source. At 5.181 GHz, the VCO system demonstrates a phase noise of -104.8 dBc/Hz at 100-kHz offset, and -127.1 dBc/Hz at 1 MHz offset, while dissipating 4.2 mA from a 1.8 V supply voltage. The corresponding figures of merit at 100 kHz and 1 MHz offset are 190.3 and 192.6 dBc/Hz/mW, respectively.
Sponsorship	IEEE Microwave Theory and Techniques Society
Starting Page	730
Ending Page	732
Page Count	3
File Size	712231
File Format	PDF
ISSN	15311309
Volume Number	17
Issue Number	10
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2007-10-01
Publisher Place	U.S.A.
Access Restriction	One Nation One Subscription (ONOS)
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Voltage control Control systems Regulators Voltage-controlled oscillators Phase noise Degradation Tail Temperature control Power supplies CMOS process voltage regulator Amplitude control loop (ACL) phase noise voltage-controlled oscillator (VCO)
Content Type	Text
Resource Type	Article
Subject	Condensed Matter Physics Electrical and Electronic Engineering

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1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
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