NDLI: A Dual Five-Level Inverter-Fed Induction Motor Drive With Common-Mode Voltage Elimination and DC-Link Capacitor Voltage Balancing Using Only the Switching-State Redundancy

Content Provider	IEEE Xplore Digital Library
Author	Tekwani, P.N. Kanchan, R.S. Gopakumar, K.
Copyright Year	1982
Abstract	For a dual five-level inverter-fed induction motor (IM) drive, effects of DC-neutral currents on dc-link capacitor voltage fluctuations are analyzed in this paper. Operating limitations in achieving the dual task of common-mode voltage elimination and DC-link capacitor voltage balancing with a single dc power supply are further investigated for the proposed drive. In this paper, an open-loop control scheme, which uses only the availability of redundant switching states for the inverter control, is presented. Limitation of proposed open-loop control to take corrective action for any existing unbalance in capacitor voltages calls for a closed-loop control scheme, which is presented in Part II of this paper.
Sponsorship	IEEE Industrial Electronics Society
Starting Page	2600
Ending Page	2608
Page Count	9
File Size	756406
File Format	PDF
ISSN	02780046
Volume Number	54
Issue Number	5
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2007-10-01
Publisher Place	U.S.A.
Access Restriction	One Nation One Subscription (ONOS)
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Induction motor drives Capacitors Pulse width modulation inverters Open loop systems Voltage control Space vector pulse width modulation Hardware Induction motors Power supplies Low voltage switching-state redundancy Common-mode voltage (CMV) elimination dc-link capacitor voltage balancing induction motor (IM) drive multilevel inverter open-loop control
Content Type	Text
Resource Type	Article
Subject	Control and Systems Engineering Electrical and Electronic Engineering Computer Science Applications

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A Dual Five-Level Inverter-Fed Induction Motor Drive With Common-Mode Voltage Elimination and DC-Link Capacitor Voltage Balancing Using Only the Switching-State Redundancy—Part II

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