NDLI: On sampling algorithms in multilevel QR factorization method for magnetoquasistatic analysis of integrated circuits over multilayered lossy substrates

Content Provider	IEEE Xplore Digital Library
Author	Hao Gang Wang Chi Hou Chan Leung Tsang Jandhyala, V.
Copyright Year	1982
Abstract	This paper proposes improvements in the row and column samplings of the multilevel QR factorization method known as IES³, a fast integral equation solver previously proposed for efficient three-dimensional (3-D) parameter extraction. First, a rigorous Gram-Schmidt row sampling is developed to replace the row sampling algorithm in IES³, leading to a more stable algorithm. Second, to further enhance the efficiency of column sampling, a new scheme based on the idea of locating the interpolation points is presented. Error analyses indicate that the proposed schemes have higher accuracies than the original sampling in IES³, especially when the number of sampled points is small. The IES³ that uses one of these improved algorithms is called improved multilevel matrix QR factorization (IMLMQRF). These IMLMQRFs are applied in the magnetoquasistatic analysis of printed circuits on multilayered lossy medium for extractions of inductances and resistances. The frequency dependency of such parameters is also illustrated
Sponsorship	IEEE Council on Electronic Design Automation IEEE Circuits and Systems Society
Starting Page	1777
Ending Page	1792
Page Count	16
File Size	1350193
File Format	PDF
ISSN	02780070
Volume Number	25
Issue Number	9
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2006-09-01
Publisher Place	U.S.A.
Access Restriction	One Nation One Subscription (ONOS)
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Sampling methods Circuit analysis Magnetic analysis Algorithm design and analysis Integral equations Parameter extraction Interpolation Error analysis Transmission line matrix methods Printed circuits sampling algorithm Improved multilevel matrix QR factorization (IMLMQRF) large-scale EM simulation magnetoquasistatic radio frequency integrated circuits
Content Type	Text
Resource Type	Article
Subject	Computer Graphics and Computer-Aided Design Electrical and Electronic Engineering Software

Sl.	Authority	Responsibilities	Communication Details
1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
5	Website/Portal (Helpdesk)	Queries regarding NDLI and its services	support@ndl.gov.in
6	Contents and Copyright Issues	Queries related to content curation and copyright issues	content@ndl.gov.in
7	National Digital Library of India Club (NDLI Club)	Queries related to NDLI Club formation, support, user awareness program, seminar/symposium, collaboration, social media, promotion, and outreach	clubsupport@ndl.gov.in
8	Digital Preservation Centre (DPC)	Assistance with digitizing and archiving copyright-free printed books	dpc@ndl.gov.in
9	IDR Setup or Support	Queries related to establishment and support of Institutional Digital Repository (IDR) and IDR workshops	idr@ndl.gov.in

A Rigorous and Efficient Analysis of 3-D Printed Circuits: Vertical Conductors Arbitrarily Distributed in Multilayer Environment

A new multilevel Green's function interpolation method for large-scale low-frequency EM simulations

Multilayered substrate integrated waveguide (MSIW) elliptic filter

Yield prediction by sampling IC layout

Learning redesign knowledge circuit redesign

NICSLU: An Adaptive Sparse Matrix Solver for Parallel Circuit Simulation

A broad-band adaptive-frequency-sampling approach for microwave-circuit EM simulation exploiting Stoer-Bulirsch algorithm

A parasitics extraction and network reduction algorithm for analog VLSI

Comprehensive Generation of Hierarchical Placement Rules for Analog Integrated Circuits

On sampling algorithms in multilevel QR factorization method for magnetoquasistatic analysis of integrated circuits over multilayered lossy substrates

Similar Documents

A Rigorous and Efficient Analysis of 3-D Printed Circuits: Vertical Conductors Arbitrarily Distributed in Multilayer Environment

A new multilevel Green's function interpolation method for large-scale low-frequency EM simulations

Multilayered substrate integrated waveguide (MSIW) elliptic filter

Yield prediction by sampling IC layout

Learning redesign knowledge circuit redesign

NICSLU: An Adaptive Sparse Matrix Solver for Parallel Circuit Simulation

A broad-band adaptive-frequency-sampling approach for microwave-circuit EM simulation exploiting Stoer-Bulirsch algorithm

A parasitics extraction and network reduction algorithm for analog VLSI

Comprehensive Generation of Hierarchical Placement Rules for Analog Integrated Circuits

On sampling algorithms in multilevel QR factorization method for magnetoquasistatic analysis of integrated circuits over multilayered lossy substrates