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| Content Provider | IEEE Xplore Digital Library |
|---|---|
| Author | Muhammad, K. Staszewski, R.B. Leipold, D. |
| Copyright Year | 1979 |
| Abstract | RF circuits for multi-gigahertz frequencies have recently migrated to state-of-the-art low-cost digital CMOS processes. This article visits fundamental techniques recently developed that migrate RF and analog design complexity to the digital domain for a wireless RF transceiver. All-digital phase locked loop and direct RF sampling techniques allow great flexibility in reconfigurable radio design. Digital signal processing concepts are used to help relieve analog design complexity, allowing one to reduce cost and power consumption in a reconfigurable design environment. Software layers are defined to enable these architectures to develop an efficient software-defined radio. The ideas presented have been used to develop two generations of commercial digital RF processors: a single-chip Bluetooth radio and a single-chip GSM radio. |
| Starting Page | 105 |
| Ending Page | 113 |
| Page Count | 9 |
| File Size | 222690 |
| File Format | |
| ISSN | 01636804 |
| Volume Number | 43 |
| Issue Number | 8 |
| Language | English |
| Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Publisher Date | 2005-08-01 |
| Publisher Place | U.S.A. |
| Access Restriction | One Nation One Subscription (ONOS) |
| Rights Holder | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Subject Keyword | Radio frequency Radio transmitters Telephone sets Frequency conversion Manufacturing GSM Filters Frequency estimation Costs Bluetooth |
| Content Type | Text |
| Resource Type | Article |
| Subject | Computer Networks and Communications Electrical and Electronic Engineering Computer Science Applications |
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