NDLI: The design and multiplier-less realization of software radio receivers with reduced system delay

Content Provider	IEEE Xplore Digital Library
Author	Yeung, K.S. Chan, S.C.
Copyright Year	2004
Abstract	This work studies the design and multiplier-less realization of a new software radio receiver (SRR) with reduced system delay. It employs low-delay finite-impulse response (FIR) and digital allpass filters to effectively reduce the system delay of the multistage decimators in SRRs. The optimal least-square and minimax designs of these low-delay FIR and allpass-based filters are formulated as a semi-definite programming (SDP) problem, which allows zero magnitude constraint at /spl omega/=/spl pi/ to be incorporated readily as additional linear matrix inequalities (LMIs). By implementing the sampling rate converter (SRC) using a variable digital filter (VDF) immediately after the integer decimators, the needs for an expensive programmable FIR filter in the traditional SRR is avoided. A new method for the optimal minimax design of this VDF-based SRC using SDP is also proposed and compared with traditional weight least squares method. Other implementation issues including the multiplier-less and digital signal processor (DSP) realizations of the SRR and the generation of the clock signal in the SRC are also studied. Design results show that the system delay and implementation complexities (especially in terms of high-speed variable multipliers) of the proposed architecture are considerably reduced as compared with conventional approaches.
Sponsorship	IEEE Circuits and Systems Society
Starting Page	2444
Ending Page	2459
Page Count	16
File Size	2391671
File Format	PDF
ISSN	15498328
Volume Number	51
Issue Number	12
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2004-12-01
Publisher Place	U.S.A.
Access Restriction	One Nation One Subscription (ONOS)
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Software radio Receivers Delay systems Finite impulse response filter Digital filters Minimax techniques Delay effects Nonlinear filters Linear programming Linear matrix inequalities variable digital filters (VDF) Design and multiplier-less realization low delay passband linear-phase finite-impulse response (FIR) and allpass filters sampling rate conversion semidefinite programming (SDP) software radio receiver (SRR)
Content Type	Text
Resource Type	Article
Subject	Electrical and Electronic Engineering Hardware and Architecture

Sl.	Authority	Responsibilities	Communication Details
1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
5	Website/Portal (Helpdesk)	Queries regarding NDLI and its services	support@ndl.gov.in
6	Contents and Copyright Issues	Queries related to content curation and copyright issues	content@ndl.gov.in
7	National Digital Library of India Club (NDLI Club)	Queries related to NDLI Club formation, support, user awareness program, seminar/symposium, collaboration, social media, promotion, and outreach	clubsupport@ndl.gov.in
8	Digital Preservation Centre (DPC)	Assistance with digitizing and archiving copyright-free printed books	dpc@ndl.gov.in
9	IDR Setup or Support	Queries related to establishment and support of Institutional Digital Repository (IDR) and IDR workshops	idr@ndl.gov.in

On the application of variable digital filters (VDF) to the realization of software radio receivers

Minimax design of adjustable FIR filters using 2D polynomial methods

Design of Complex FIR Filters With Reduced Group Delay Error Using Semidefinite Programming

Design of FIR filters with flatness constraints

On the minimax design of passband linear-phase variable digital filters using semidefinite programming

FIR filter design with group delay constraint using semidefinite programming

On the design and multiplier-less realization of digital IF for software radio receivers with prescribed output accuracy

The design of constrained minimax FIR digital filters using quadratic programming

Design of nonlinear-phase FIR digital filters: a semidefinite programming approach

The design and multiplier-less realization of software radio receivers with reduced system delay

Similar Documents

On the application of variable digital filters (VDF) to the realization of software radio receivers

Minimax design of adjustable FIR filters using 2D polynomial methods

Design of Complex FIR Filters With Reduced Group Delay Error Using Semidefinite Programming

Design of FIR filters with flatness constraints

On the minimax design of passband linear-phase variable digital filters using semidefinite programming

FIR filter design with group delay constraint using semidefinite programming

On the design and multiplier-less realization of digital IF for software radio receivers with prescribed output accuracy

The design of constrained minimax FIR digital filters using quadratic programming

Design of nonlinear-phase FIR digital filters: a semidefinite programming approach

The design and multiplier-less realization of software radio receivers with reduced system delay