NDLI: A virtual DSP architecture for audio applications from a complexity analysis of MPEG-4 structured audio

Content Provider	IEEE Xplore Digital Library
Author	Zoia, G. Alberti, C.
Copyright Year	1999
Abstract	The MPEG-4 audio standard provides several toolsets for natural and synthetic sound coding. Among them, the most innovative in terms of multimedia applications is Structured Audio (SA), which implements a high level, structured description of sound instead of the usual compression techniques based on psychoacoustics and subband analysis. SA permits to encode synthesis and processing algorithms by its Structured Audio Orchestra Language (SAOL), and it can theoretically be used to specify any other audio decoder. This great flexibility introduces a challenging implementation problem, which in a normative framework has to be solved by a systematic approach. In the first part of the paper, it is described how the SA decoding process can be analyzed in a platform independent way in order to determine the fundamental figures of this coding technique; it is then shown how the proposed method is being used for the MPEG-4 SA conformance test. In the second part the design of a virtual digital signal processor (DSP) architecture is presented, based on the results of the complexity analysis. This architecture is able to exploit the intrinsic data level parallelism of many Audio algorithms and to consistently reduce the implementation cost. Experimental results prove the effectiveness of the approach and its suitability for implementations on modern superscalar DSPs and multimedia processors.
Sponsorship	IEEE Signal Processing Society IEEE Circuits and Systems Society IEEE Communications Society IEEE Computer Society
Starting Page	317
Ending Page	328
Page Count	12
File Size	1598755
File Format	PDF
ISSN	15209210
Volume Number	5
Issue Number	3
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2003-09-01
Publisher Place	U.S.A.
Access Restriction	One Nation One Subscription (ONOS)
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Digital signal processing MPEG 4 Standard Signal processing algorithms Decoding Psychoacoustics Testing Signal design Digital signal processors Signal analysis Costs
Content Type	Text
Resource Type	Article
Subject	Signal Processing Electrical and Electronic Engineering Computer Science Applications Media Technology

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1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
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9	IDR Setup or Support	Queries related to establishment and support of Institutional Digital Repository (IDR) and IDR workshops	idr@ndl.gov.in

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