NDLI: A comprehensive signature analysis scheme for oscillation-test

Content Provider	IEEE Xplore Digital Library
Author	Jeongjin Roh Abraham, J.A.
Copyright Year	1982
Abstract	A low-cost and comprehensive built-in self-test (BIST) methodology for analog and mixed-signal circuits is described. We implement a time-division multiplexing (TDM) comparator to analyze the response of a circuit under test with minimum hardware overhead. The TDM comparator scheme is an effective signature analyzer for on-chip analog response compaction and pass/fail decision. We apply this scheme to an oscillation-test environment and implement a low-cost and comprehensive vectorless BIST methodology for high fault and yield coverage. Our scheme allows a tolerance in the output response, a feature necessary for analog circuits. Both oscillation frequency and oscillation amplitude are measured indirectly to increase the fault coverage. We provide a theoretical analysis of the oscillation that explains why the amplitude measurement is essential. Simulation results demonstrate that the proposed scheme can significantly reduce test time of the oscillation-test while achieving higher fault coverage.
Sponsorship	IEEE Council on Electronic Design Automation IEEE Circuits and Systems Society
Starting Page	1409
Ending Page	1423
Page Count	15
File Size	764692
File Format	PDF
ISSN	02780070
Volume Number	22
Issue Number	10
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2003-10-01
Publisher Place	U.S.A.
Access Restriction	One Nation One Subscription (ONOS)
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Built-in self-test Circuit testing Circuit faults Time division multiplexing Hardware Failure analysis Compaction Analog circuits Frequency measurement Circuit simulation
Content Type	Text
Resource Type	Article
Subject	Computer Graphics and Computer-Aided Design Electrical and Electronic Engineering Software

Sl.	Authority	Responsibilities	Communication Details
1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
5	Website/Portal (Helpdesk)	Queries regarding NDLI and its services	support@ndl.gov.in
6	Contents and Copyright Issues	Queries related to content curation and copyright issues	content@ndl.gov.in
7	National Digital Library of India Club (NDLI Club)	Queries related to NDLI Club formation, support, user awareness program, seminar/symposium, collaboration, social media, promotion, and outreach	clubsupport@ndl.gov.in
8	Digital Preservation Centre (DPC)	Assistance with digitizing and archiving copyright-free printed books	dpc@ndl.gov.in
9	IDR Setup or Support	Queries related to establishment and support of Institutional Digital Repository (IDR) and IDR workshops	idr@ndl.gov.in

A comprehensive TDM comparator scheme for effective analysis of oscillation-based test

Test response compaction using multiplexed parity trees

On the quality of accumulator-based compaction of test responses

A New ATPG Technique (ExpoTan) for Testing Analog Circuits

Spectral analysis for statistical response compaction during built-in self-testing

An analysis of the probabilistic behavior of linear feedback signature registers

Aliasing in signature analysis testing with multiple input shift registers

On using signature registers as pseudorandom pattern generators in built-in self-testing

A parity bit signature for exhaustive testing

A comprehensive signature analysis scheme for oscillation-test

Similar Documents

A comprehensive TDM comparator scheme for effective analysis of oscillation-based test

Test response compaction using multiplexed parity trees

On the quality of accumulator-based compaction of test responses

A New ATPG Technique (ExpoTan) for Testing Analog Circuits

Spectral analysis for statistical response compaction during built-in self-testing

An analysis of the probabilistic behavior of linear feedback signature registers

Aliasing in signature analysis testing with multiple input shift registers

On using signature registers as pseudorandom pattern generators in built-in self-testing

A parity bit signature for exhaustive testing

A comprehensive signature analysis scheme for oscillation-test